[PATCH] drm/amd/pp: Clean register first to avoid read original value

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Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

________________________________
From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> on behalf of Rex Zhu <Rex.Zhu at amd.com>
Sent: Friday, March 30, 2018 3:33:26 AM
To: amd-gfx at lists.freedesktop.org
Cc: Zhu, Rex
Subject: [PATCH] drm/amd/pp: Clean register first to avoid read original value

Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>
---
 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index aaa9f5b..38cf3a1 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -3368,6 +3368,19 @@ static int smu7_get_gpu_power(struct pp_hwmgr *hwmgr,
                         "Failed to start pm status log!",
                         return -1);

+       cgs_write_ind_register(hwmgr->device,
+                       CGS_IND_REG__SMC,
+                       ixSMU_PM_STATUS_40, 0);
+       cgs_write_ind_register(hwmgr->device,
+                       CGS_IND_REG__SMC,
+                       ixSMU_PM_STATUS_49, 0);
+       cgs_write_ind_register(hwmgr->device,
+                       CGS_IND_REG__SMC,
+                       ixSMU_PM_STATUS_94, 0);
+       cgs_write_ind_register(hwmgr->device,
+                       CGS_IND_REG__SMC,
+                       ixSMU_PM_STATUS_95, 0);
+
         /* Sampling period from 50ms to 4sec */
         msleep_interruptible(200);

--
1.9.1

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