On Mon, Mar 26, 2018 at 03:39:49PM +0800, Kenneth Feng wrote:
> Change-Id: Id4bc19b0df93d96f38e5254246a885af8679c034
It would better to add the description for ACG SS feature such as the
benefit after enabled it.
> Signed-off-by: Kenneth Feng <kenneth.feng at amd.com>
> ---
> drivers/gpu/drm/amd/include/atomfirmware.h | 12 ++++++++----
> drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c | 10 +++++++---
> drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h | 22 +++++++++++++---------
> drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c | 2 +-
> drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h | 2 +-
> .../amd/powerplay/hwmgr/vega12_processpptables.c | 11 ++++++++---
> .../drm/amd/powerplay/inc/vega12/smu9_driver_if.h | 16 ++++++++++------
> drivers/gpu/drm/amd/powerplay/inc/vega12_ppsmc.h | 7 ++++++-
> 8 files changed, 54 insertions(+), 28 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/include/atomfirmware.h b/drivers/gpu/drm/amd/include/atomfirmware.h
> index 3ae3da4..0f5ad54 100644
> --- a/drivers/gpu/drm/amd/include/atomfirmware.h
> +++ b/drivers/gpu/drm/amd/include/atomfirmware.h
> @@ -1264,9 +1264,9 @@ struct atom_smc_dpm_info_v4_1
> uint8_t ledpin2;
> uint8_t padding8_4;
>
> - uint8_t gfxclkspreadenabled;
> - uint8_t gfxclkspreadpercent;
> - uint16_t gfxclkspreadfreq;
> + uint8_t pllgfxclkspreadenabled;
> + uint8_t pllgfxclkspreadpercent;
> + uint16_t pllgfxclkspreadfreq;
>
Are the gfxclkspread* related to ACG?
I think this patch can be separated to two:
1. Rename gfxclk* to pplgfxclk*
2. Add acggfxclk* parameters to smc table and enable it after that.
Thanks,
Ray
> uint8_t uclkspreadenabled;
> uint8_t uclkspreadpercent;
> @@ -1276,7 +1276,11 @@ struct atom_smc_dpm_info_v4_1
> uint8_t socclkspreadpercent;
> uint16_t socclkspreadfreq;
>
> - uint32_t boardreserved[3];
> + uint8_t acggfxclkspreadenabled;
> + uint8_t acggfxclkspreadpercent;
> + uint16_t acggfxclkspreadfreq;
> +
> + uint32_t boardreserved[10];
> };
>
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c b/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c
> index 55f9b30..ad42caa 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c
> @@ -616,9 +616,9 @@ int pp_atomfwctrl_get_smc_dpm_information(struct pp_hwmgr *hwmgr,
> param->ledpin1 = info->ledpin1;
> param->ledpin2 = info->ledpin2;
>
> - param->gfxclkspreadenabled = info->gfxclkspreadenabled;
> - param->gfxclkspreadpercent = info->gfxclkspreadpercent;
> - param->gfxclkspreadfreq = info->gfxclkspreadfreq;
> + param->pllgfxclkspreadenabled = info->pllgfxclkspreadenabled;
> + param->pllgfxclkspreadpercent = info->pllgfxclkspreadpercent;
> + param->pllgfxclkspreadfreq = info->pllgfxclkspreadfreq;
>
> param->uclkspreadenabled = info->uclkspreadenabled;
> param->uclkspreadpercent = info->uclkspreadpercent;
> @@ -628,5 +628,9 @@ int pp_atomfwctrl_get_smc_dpm_information(struct pp_hwmgr *hwmgr,
> param->socclkspreadpercent = info->socclkspreadpercent;
> param->socclkspreadfreq = info->socclkspreadfreq;
>
> + param->acggfxclkspreadenabled = info->acggfxclkspreadenabled;
> + param->acggfxclkspreadpercent = info->acggfxclkspreadpercent;
> + param->acggfxclkspreadfreq = info->acggfxclkspreadfreq;
> +
> return 0;
> }
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h b/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h
> index a957d8f..5b39c48 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h
> @@ -192,17 +192,21 @@ struct pp_atomfwctrl_smc_dpm_parameters
> uint8_t ledpin1;
> uint8_t ledpin2;
>
> - uint8_t gfxclkspreadenabled;
> - uint8_t gfxclkspreadpercent;
> - uint16_t gfxclkspreadfreq;
> + uint8_t pllgfxclkspreadenabled;
> + uint8_t pllgfxclkspreadpercent;
> + uint16_t pllgfxclkspreadfreq;
>
> - uint8_t uclkspreadenabled;
> - uint8_t uclkspreadpercent;
> - uint16_t uclkspreadfreq;
> + uint8_t uclkspreadenabled;
> + uint8_t uclkspreadpercent;
> + uint16_t uclkspreadfreq;
>
> - uint8_t socclkspreadenabled;
> - uint8_t socclkspreadpercent;
> - uint16_t socclkspreadfreq;
> + uint8_t socclkspreadenabled;
> + uint8_t socclkspreadpercent;
> + uint16_t socclkspreadfreq;
> +
> + uint8_t acggfxclkspreadenabled;
> + uint8_t acggfxclkspreadpercent;
> + uint16_t acggfxclkspreadfreq;
> };
>
> int pp_atomfwctrl_get_gpu_pll_dividers_vega10(struct pp_hwmgr *hwmgr,
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
> index f0bcac4..c9977f5 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
> @@ -366,7 +366,7 @@ static void vega12_init_dpm_defaults(struct pp_hwmgr *hwmgr)
> data->smu_features[GNLD_DIDT].smu_feature_id = FEATURE_GFX_EDC_BIT;
> data->smu_features[GNLD_GFXOFF].smu_feature_id = FEATURE_GFXOFF_BIT;
> data->smu_features[GNLD_CG].smu_feature_id = FEATURE_CG_BIT;
> - data->smu_features[GNLD_ACG].smu_feature_id = FEATURE_ACG_BIT;
> + data->smu_features[GNLD_ACG_DEBUG].smu_feature_id = FEATURE_ACG_DEBUG_BIT;
>
> for (i = 0; i < GNLD_FEATURES_MAX; i++) {
> data->smu_features[i].smu_feature_bitmap =
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h
> index 644c7f0..b9888b5 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h
> @@ -68,7 +68,7 @@ enum
> GNLD_DIDT,
> GNLD_GFXOFF,
> GNLD_CG,
> - GNLD_ACG,
> + GNLD_ACG_DEBUG,
>
> GNLD_FEATURES_MAX
> };
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_processpptables.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_processpptables.c
> index e7d7949..b34113f 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_processpptables.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_processpptables.c
> @@ -208,9 +208,9 @@ static int append_vbios_pptable(struct pp_hwmgr *hwmgr, PPTable_t *ppsmc_pptable
> ppsmc_pptable->LedPin1 = smc_dpm_table.ledpin1;
> ppsmc_pptable->LedPin2 = smc_dpm_table.ledpin2;
>
> - ppsmc_pptable->GfxclkSpreadEnabled = smc_dpm_table.gfxclkspreadenabled;
> - ppsmc_pptable->GfxclkSpreadPercent = smc_dpm_table.gfxclkspreadpercent;
> - ppsmc_pptable->GfxclkSpreadFreq = smc_dpm_table.gfxclkspreadfreq;
> + ppsmc_pptable->PllGfxclkSpreadEnabled = smc_dpm_table.pllgfxclkspreadenabled;
> + ppsmc_pptable->PllGfxclkSpreadPercent = smc_dpm_table.pllgfxclkspreadpercent;
> + ppsmc_pptable->PllGfxclkSpreadFreq = smc_dpm_table.pllgfxclkspreadfreq;
>
> ppsmc_pptable->UclkSpreadEnabled = 0;
> ppsmc_pptable->UclkSpreadPercent = smc_dpm_table.uclkspreadpercent;
> @@ -220,6 +220,11 @@ static int append_vbios_pptable(struct pp_hwmgr *hwmgr, PPTable_t *ppsmc_pptable
> ppsmc_pptable->SocclkSpreadPercent = smc_dpm_table.socclkspreadpercent;
> ppsmc_pptable->SocclkSpreadFreq = smc_dpm_table.socclkspreadfreq;
>
> + ppsmc_pptable->AcgGfxclkSpreadEnabled = smc_dpm_table.acggfxclkspreadenabled;
> + ppsmc_pptable->AcgGfxclkSpreadPercent = smc_dpm_table.acggfxclkspreadpercent;
> + ppsmc_pptable->AcgGfxclkSpreadFreq = smc_dpm_table.acggfxclkspreadfreq;
> +
> +
> return 0;
> }
>
> diff --git a/drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h b/drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h
> index cd2e503..0087c3d 100644
> --- a/drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h
> +++ b/drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h
> @@ -92,7 +92,7 @@
> #define FEATURE_GFX_EDC_BIT 25
> #define FEATURE_GFXOFF_BIT 26
> #define FEATURE_CG_BIT 27
> -#define FEATURE_ACG_BIT 28
> +#define FEATURE_ACG_DEBUG_BIT 28
> #define FEATURE_SPARE_29_BIT 29
> #define FEATURE_SPARE_30_BIT 30
> #define FEATURE_SPARE_31_BIT 31
> @@ -127,7 +127,7 @@
> #define FEATURE_GFX_EDC_MASK (1 << FEATURE_GFX_EDC_BIT )
> #define FEATURE_GFXOFF_MASK (1 << FEATURE_GFXOFF_BIT )
> #define FEATURE_CG_MASK (1 << FEATURE_CG_BIT )
> -#define FEATURE_ACG_MASK (1 << FEATURE_ACG_BIT )
> +#define FEATURE_ACG_DEBUG_MASK (1 << FEATURE_ACG_DEBUG_BIT)
> #define FEATURE_SPARE_29_MASK (1 << FEATURE_SPARE_29_BIT )
> #define FEATURE_SPARE_30_MASK (1 << FEATURE_SPARE_30_BIT )
> #define FEATURE_SPARE_31_MASK (1 << FEATURE_SPARE_31_BIT )
> @@ -481,9 +481,9 @@ typedef struct {
> uint8_t padding8_4;
>
>
> - uint8_t GfxclkSpreadEnabled;
> - uint8_t GfxclkSpreadPercent;
> - uint16_t GfxclkSpreadFreq;
> + uint8_t PllGfxclkSpreadEnabled;
> + uint8_t PllGfxclkSpreadPercent;
> + uint16_t PllGfxclkSpreadFreq;
>
> uint8_t UclkSpreadEnabled;
> uint8_t UclkSpreadPercent;
> @@ -493,7 +493,11 @@ typedef struct {
> uint8_t SocclkSpreadPercent;
> uint16_t SocclkSpreadFreq;
>
> - uint32_t BoardReserved[3];
> + uint8_t AcgGfxclkSpreadEnabled;
> + uint8_t AcgGfxclkSpreadPercent;
> + uint16_t AcgGfxclkSpreadFreq;
> +
> + uint32_t BoardReserved[10];
>
>
> uint32_t MmHubPadding[7];
> diff --git a/drivers/gpu/drm/amd/powerplay/inc/vega12_ppsmc.h b/drivers/gpu/drm/amd/powerplay/inc/vega12_ppsmc.h
> index f985c78..0c5e17c 100644
> --- a/drivers/gpu/drm/amd/powerplay/inc/vega12_ppsmc.h
> +++ b/drivers/gpu/drm/amd/powerplay/inc/vega12_ppsmc.h
> @@ -113,7 +113,12 @@
> #define PPSMC_MSG_DisallowGfxOff 0x52
> #define PPSMC_MSG_GetPptLimit 0x53
> #define PPSMC_MSG_GetDcModeMaxDpmFreq 0x54
> -#define PPSMC_Message_Count 0x56
> +#define PPSMC_MSG_GetDebugData 0x55
> +#define PPSMC_MSG_BacoAudioD3PME 0x56
> +#define PPSMC_MSG_AudioDStateInterruptControl 0x57
> +#define PPSMC_MSG_SetDramAddrVirt 0x58
> +#define PPSMC_Message_Count 0x59
> +
>
> typedef uint16_t PPSMC_Result;
> typedef int PPSMC_Msg;
> --
> 2.7.4
>
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