On 2018-03-15 09:47 AM, Tom St Denis wrote: > Partial revert of 1b0ff66bc0bf1a0559255cb7b066a65d55491974 > > Signed-off-by: Tom St Denis <tom.stdenis at amd.com> Thanks for your patch. It seems like on some systems this is not enough as D1 is off and D2-4 are on, which would still early return from this function. I sent a patch that should resolve this in all cases. Harry > --- > drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c > index 4365906b14ee..7688ed5724b9 100644 > --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c > +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c > @@ -228,6 +228,9 @@ static void disable_vga( > return; > > REG_WRITE(D1VGA_CONTROL, 0); > + REG_WRITE(D2VGA_CONTROL, 0); > + REG_WRITE(D3VGA_CONTROL, 0); > + REG_WRITE(D4VGA_CONTROL, 0); > > /* HW Engineer's Notes: > * During switch from vga->extended, if we set the VGA_TEST_ENABLE and >
