[PATCH libdrm] amdgpu:support 16 ibs per submit for PAL/SRIOV

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Am 08.03.2018 um 18:31 schrieb Marek Olšák:
> From: Qiang Yu <Qiang.Yu at amd.com>
>
> to support SRIOV and MCBP, need 16 IBs per submit
>
> Signed-off-by: Qiang Yu <Qiang.Yu at amd.com>
> Reviewed-by: Junwei Zhang <Jerry.Zhang at amd.com>

Acked-by: Christian König <christian.koenig at amd.com>

> ---
>   amdgpu/amdgpu.h | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h
> index 928b2a6..8950341 100644
> --- a/amdgpu/amdgpu.h
> +++ b/amdgpu/amdgpu.h
> @@ -46,21 +46,21 @@ struct drm_amdgpu_info_hw_ip;
>   /*--------------------------------------------------------------------------*/
>   /* --------------------------- Defines ------------------------------------ */
>   /*--------------------------------------------------------------------------*/
>   
>   /**
>    * Define max. number of Command Buffers (IB) which could be sent to the single
>    * hardware IP to accommodate CE/DE requirements
>    *
>    * \sa amdgpu_cs_ib_info
>   */
> -#define AMDGPU_CS_MAX_IBS_PER_SUBMIT		4
> +#define AMDGPU_CS_MAX_IBS_PER_SUBMIT		16
>   
>   /**
>    * Special timeout value meaning that the timeout is infinite.
>    */
>   #define AMDGPU_TIMEOUT_INFINITE			0xffffffffffffffffull
>   
>   /**
>    * Used in amdgpu_cs_query_fence_status(), meaning that the given timeout
>    * is absolute.
>    */



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