Reviewed-by: Evan Quan <evan.quan at amd.com> -----Original Message----- From: amd-gfx [mailto:amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx] On Behalf Of Rex Zhu Sent: Friday, March 02, 2018 6:49 PM To: amd-gfx at lists.freedesktop.org Cc: Zhu, Rex <Rex.Zhu at amd.com> Subject: [PATCH] drm/amd/pp: Fix incorrect return value in smu7_check_clk_voltage_valid Change-Id: I248982c5e0100b7a975d1a19781749baeadd71f4 Signed-off-by: Rex Zhu <Rex.Zhu at amd.com> --- drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c index dbfe139..10fb3ec 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c @@ -4692,7 +4692,7 @@ static bool smu7_check_clk_voltage_valid(struct pp_hwmgr *hwmgr, struct phm_ppt_v1_clock_voltage_dependency_table *dep_sclk_table; if (table_info == NULL) - return -EINVAL; + return false; dep_sclk_table = table_info->vdd_dep_on_sclk; min_vddc = dep_sclk_table->entries[0].vddc; -- 1.9.1 _______________________________________________ amd-gfx mailing list amd-gfx at lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
