The 32bit address range end is exclusive, not inclusive. This fixes crashes
when 32bit addresses are in use.
Signed-off-by: Christian König <christian.koenig at amd.com>
---
amdgpu/amdgpu_device.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/amdgpu/amdgpu_device.c b/amdgpu/amdgpu_device.c
index 9ff6ad16..fb2cfb57 100644
--- a/amdgpu/amdgpu_device.c
+++ b/amdgpu/amdgpu_device.c
@@ -323,9 +323,9 @@ int amdgpu_query_sw_info(amdgpu_device_handle dev, enum amdgpu_sw_info info,
switch (info) {
case amdgpu_sw_info_address32_hi:
if (dev->vamgr_high_32.va_max)
- *val32 = dev->vamgr_high_32.va_max >> 32;
+ *val32 = (dev->vamgr_high_32.va_max - 1) >> 32;
else
- *val32 = dev->vamgr_32.va_max >> 32;
+ *val32 = (dev->vamgr_32.va_max - 1) >> 32;
return 0;
}
return -EINVAL;
--
2.14.1
