Reviewed-by: Marek Olšák <marek.olsak at amd.com> Marek On Mon, Feb 26, 2018 at 2:17 PM, Christian König <ckoenig.leichtzumerken at gmail.com> wrote: > We now have hopefully fixed all bugs regarding high addresses on Vega10 and > Raven. Start to use the high range to make room for SVM in the low > range. > > Signed-off-by: Christian König <christian.koenig at amd.com> > --- > src/gallium/winsys/amdgpu/drm/amdgpu_bo.c | 16 ++++++++++++---- > 1 file changed, 12 insertions(+), 4 deletions(-) > > diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c > index 19f6fedf7c..12d497d292 100644 > --- a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c > +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c > @@ -38,6 +38,10 @@ > #define AMDGPU_GEM_CREATE_VM_ALWAYS_VALID (1 << 6) > #endif > > +#ifndef AMDGPU_VA_RANGE_HIGH > +#define AMDGPU_VA_RANGE_HIGH 0x2 > +#endif > + > /* Set to 1 for verbose output showing committed sparse buffer ranges. */ > #define DEBUG_SPARSE_COMMITS 0 > > @@ -438,7 +442,8 @@ static struct amdgpu_winsys_bo *amdgpu_create_bo(struct amdgpu_winsys *ws, > alignment = MAX2(alignment, ws->info.pte_fragment_size); > r = amdgpu_va_range_alloc(ws->dev, amdgpu_gpu_va_range_general, > size + va_gap_size, alignment, 0, &va, &va_handle, > - flags & RADEON_FLAG_32BIT ? AMDGPU_VA_RANGE_32_BIT : 0); > + (flags & RADEON_FLAG_32BIT ? AMDGPU_VA_RANGE_32_BIT : 0) | > + AMDGPU_VA_RANGE_HIGH); > if (r) > goto error_va_alloc; > > @@ -896,7 +901,8 @@ amdgpu_bo_sparse_create(struct amdgpu_winsys *ws, uint64_t size, > va_gap_size = ws->check_vm ? 4 * RADEON_SPARSE_PAGE_SIZE : 0; > r = amdgpu_va_range_alloc(ws->dev, amdgpu_gpu_va_range_general, > map_size + va_gap_size, RADEON_SPARSE_PAGE_SIZE, > - 0, &bo->va, &bo->u.sparse.va_handle, 0); > + 0, &bo->va, &bo->u.sparse.va_handle, > + AMDGPU_VA_RANGE_HIGH); > if (r) > goto error_va_alloc; > > @@ -1290,7 +1296,8 @@ static struct pb_buffer *amdgpu_bo_from_handle(struct radeon_winsys *rws, > goto error_query; > > r = amdgpu_va_range_alloc(ws->dev, amdgpu_gpu_va_range_general, > - result.alloc_size, 1 << 20, 0, &va, &va_handle, 0); > + result.alloc_size, 1 << 20, 0, &va, &va_handle, > + AMDGPU_VA_RANGE_HIGH); > if (r) > goto error_query; > > @@ -1401,7 +1408,8 @@ static struct pb_buffer *amdgpu_bo_from_ptr(struct radeon_winsys *rws, > goto error; > > if (amdgpu_va_range_alloc(ws->dev, amdgpu_gpu_va_range_general, > - aligned_size, 1 << 12, 0, &va, &va_handle, 0)) > + aligned_size, 1 << 12, 0, &va, &va_handle, > + AMDGPU_VA_RANGE_HIGH)) > goto error_va_alloc; > > if (amdgpu_bo_va_op(buf_handle, 0, aligned_size, va, 0, AMDGPU_VA_OP_MAP)) > -- > 2.14.1 > > _______________________________________________ > mesa-dev mailing list > mesa-dev at lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev
