From: "Leo (Sunpeng) Li" <sunpeng.li@xxxxxxx>
Implement CRC for DCE8. Registers remain the same, so call DCE110 code
directly.
Change-Id: Icddc945b6a216bb96dbc9107696dc08579e6decd
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li at amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland at amd.com>
---
drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c | 8 ++++----
drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h | 6 ++++++
drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c | 2 ++
3 files changed, 12 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c
index 078d18c3eee5..be7153924a70 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c
@@ -2091,8 +2091,8 @@ static bool dce110_is_tg_enabled(struct timing_generator *tg)
return field == 1;
}
-static bool dce110_configure_crc(struct timing_generator *tg,
- const struct crc_params *params)
+bool dce110_configure_crc(struct timing_generator *tg,
+ const struct crc_params *params)
{
uint32_t cntl_addr = 0;
uint32_t addr = 0;
@@ -2168,8 +2168,8 @@ static bool dce110_configure_crc(struct timing_generator *tg,
return true;
}
-static bool dce110_get_crc(struct timing_generator *tg,
- uint32_t *r_cr, uint32_t *g_y, uint32_t *b_cb)
+bool dce110_get_crc(struct timing_generator *tg,
+ uint32_t *r_cr, uint32_t *g_y, uint32_t *b_cb)
{
uint32_t addr = 0;
uint32_t value = 0;
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h b/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h
index 232747c7c60b..734d4965dab1 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h
@@ -276,4 +276,10 @@ void dce110_tg_set_colors(struct timing_generator *tg,
bool dce110_arm_vert_intr(
struct timing_generator *tg, uint8_t width);
+bool dce110_configure_crc(struct timing_generator *tg,
+ const struct crc_params *params);
+
+bool dce110_get_crc(struct timing_generator *tg,
+ uint32_t *r_cr, uint32_t *g_y, uint32_t *b_cb);
+
#endif /* __DC_TIMING_GENERATOR_DCE110_H__ */
diff --git a/drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c b/drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c
index 2934650e0434..3ba4712a35ab 100644
--- a/drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c
+++ b/drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c
@@ -212,6 +212,8 @@ static const struct timing_generator_funcs dce80_tg_funcs = {
/* DCE8.0 overrides */
.enable_advanced_request =
dce80_timing_generator_enable_advanced_request,
+ .configure_crc = dce110_configure_crc,
+ .get_crc = dce110_get_crc,
};
void dce80_timing_generator_construct(
--
2.14.1
