[PATCH 5/9] drm/amdgpu: user reserved zfb to init vram base offset and size

[Feifei.Xu@xxxxxxx (Feifei Xu)]

Change-Id: I3beb3ca3f958fdd63b3ce7068b59ebf957b49a5a
Signed-off-by: Hawking Zhang <Hawking.Zhang at amd.com>
Signed-off-by: Feifei Xu <Feifei.Xu at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c |  5 ++++-
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c    | 18 +++++++++++++-----
 2 files changed, 17 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
index 94a07bc..ec09c32 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
@@ -32,7 +32,10 @@
 
 u64 gfxhub_v1_0_get_mc_fb_offset(struct amdgpu_device *adev)
 {
-	return (u64)RREG32_SOC15(GC, 0, mmMC_VM_FB_OFFSET) << 24;
+	if (adev->gmc.enable_zfb)
+		return adev->gmc.zfb_phys_addr;
+	else
+		return (u64)RREG32_SOC15(GC, 0, mmMC_VM_FB_OFFSET) << 24;
 }
 
 static void gfxhub_v1_0_init_gart_pt_regs(struct amdgpu_device *adev)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 27f50c8..8fd7b01 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -745,9 +745,12 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev)
 		adev->gmc.vram_width = numchan * chansize;
 	}
 
-	/* size in MB on si */
-	adev->gmc.mc_vram_size =
-		adev->nbio_funcs->get_memsize(adev) * 1024ULL * 1024ULL;
+	if (adev->gmc.enable_zfb)
+		adev->gmc.mc_vram_size = adev->gmc.zfb_size;
+	else
+		/* size in MB on si */
+		adev->gmc.mc_vram_size =
+			adev->nbio_funcs->get_memsize(adev) * 1024ULL * 1024ULL;
 	adev->gmc.real_vram_size = adev->gmc.mc_vram_size;
 
 #if !defined(BUILD_AS_DKMS) || LINUX_VERSION_CODE >= KERNEL_VERSION(4, 15, 0)
@@ -757,8 +760,13 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev)
 			return r;
 	}
 #endif
-	adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);
-	adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
+	if ( adev->gmc.enable_zfb) {
+		adev->gmc.aper_base = adev->gmc.zfb_phys_addr;
+		adev->gmc.aper_size = adev->gmc.zfb_size;
+	} else {
+		adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);
+		adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
+	}
 
 #ifdef CONFIG_X86_64
 	if (adev->flags & AMD_IS_APU) {
-- 
2.7.4