[PATCH] drm/amd/pp: Implement get_power_profile_mode on smu7

[Rex.Zhu@xxxxxxx (Rex Zhu)]

Use can get smu7 profile pamameters through sysfs

cat pp_power_profile_mode

NUM        MODE_NAME UP_HYST DOWN_HYST ACTIVE_LEVEL
  0 3D_FULL_SCREEN*:   0       100           30
  1   POWER_SAVING :  10         0           30
  2       COMPUTER :   0         5           30
  3         CUSTOM :   0         0            0

Change-Id: I8fe8bf88c2d7400a097fba2c0a3748350e35f619
Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>
---
 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 43 ++++++++++++++++++++++++
 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h |  1 +
 2 files changed, 44 insertions(+)

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index 54f569c..a1a6978 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -4927,6 +4927,47 @@ static int smu7_odn_edit_dpm_table(struct pp_hwmgr *hwmgr,
 	return 0;
 }
 
+static int smu7_get_power_profile_mode(struct pp_hwmgr *hwmgr, char *buf)
+{
+	struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
+	uint32_t i, size = 0;
+	static const uint8_t profile_mode_setting[3][3] = {{0, 100, 30},
+						{10, 0, 30},
+						{0, 5, 30},
+						};
+	static const char *profile_name[4] = {"3D_FULL_SCREEN",
+					"POWER_SAVING",
+					"COMPUTER",
+					"CUSTOM"};
+	static const char *title[5] = {"NUM",
+			"MODE_NAME",
+			"UP_HYST",
+			"DOWN_HYST",
+			"ACTIVE_LEVEL"};
+
+	if (!buf)
+		return -EINVAL;
+
+	size += sprintf(buf + size, "%s %16s %s %s %s\n",title[0],
+			title[1], title[2], title[3], title[4]);
+
+	for (i = 0; i < 3; i++)
+		size += sprintf(buf + size, "%3d %14s%s: %3d %9d %12d\n",
+			i, profile_name[i], (i == hwmgr->power_profile_mode) ? "*" : " ",
+			profile_mode_setting[i][0], profile_mode_setting[i][1],
+			profile_mode_setting[i][2]);
+	size += sprintf(buf + size, "%3d %14s%s: %3d %9d %12d\n", i,
+			profile_name[i], (i == hwmgr->power_profile_mode) ? "*" : " ",
+			data->custom_profile_mode[0], data->custom_profile_mode[1],
+			data->custom_profile_mode[2]);
+	return size;
+}
+
+static int smu7_set_power_profile_mode(struct pp_hwmgr *hwmgr, long *input, uint32_t size)
+{
+	/* To Do */
+	return 0;
+}
 
 static const struct pp_hwmgr_func smu7_hwmgr_funcs = {
 	.backend_init = &smu7_hwmgr_backend_init,
@@ -4983,6 +5024,8 @@ static int smu7_odn_edit_dpm_table(struct pp_hwmgr *hwmgr,
 	.get_max_high_clocks = smu7_get_max_high_clocks,
 	.get_thermal_temperature_range = smu7_get_thermal_temperature_range,
 	.odn_edit_dpm_table = smu7_odn_edit_dpm_table,
+	.get_power_profile_mode = smu7_get_power_profile_mode,
+	.set_power_profile_mode = smu7_set_power_profile_mode,
 };
 
 uint8_t smu7_get_sleep_divider_id_from_clock(uint32_t clock,
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h
index 1ce84cc..0adee51 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h
@@ -315,6 +315,7 @@ struct smu7_hwmgr {
 	uint16_t                              mem_latency_high;
 	uint16_t                              mem_latency_low;
 	uint32_t                              vr_config;
+	uint8_t                               custom_profile_mode[3];
 };
 
 /* To convert to Q8.8 format for firmware */
-- 
1.9.1