Add odn_edit_dpm_table function
points for setting user assigned clock/voltage.
Change-Id: I7e49ffdc30b77d07b46bf12ebb275fa0ff901588
Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>
---
drivers/gpu/drm/amd/include/kgd_pp_interface.h | 6 ++++++
drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 3 +++
2 files changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/amd/include/kgd_pp_interface.h b/drivers/gpu/drm/amd/include/kgd_pp_interface.h
index 103837c..3e8b9cc 100644
--- a/drivers/gpu/drm/amd/include/kgd_pp_interface.h
+++ b/drivers/gpu/drm/amd/include/kgd_pp_interface.h
@@ -161,6 +161,12 @@ enum {
PP_GROUP_MAX
};
+enum PP_ODN_DPM_TABLE_TYPE {
+ PP_ODN_SCLK_VDDC_TABLE,
+ PP_ODN_MCLK_VDDC_TABLE,
+ PP_ODN_RESET_DEFAULT_TABLE
+};
+
struct pp_states_info {
uint32_t nums;
uint32_t states[16];
diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
index 7caab09..47afbca 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
@@ -345,6 +345,9 @@ struct pp_hwmgr_func {
struct PP_TemperatureRange *range);
int (*get_power_profile_mode)(struct pp_hwmgr *hwmgr, char *buf);
int (*set_power_profile_mode)(struct pp_hwmgr *hwmgr, long *input, uint32_t size);
+ int (*odn_edit_dpm_table)(struct pp_hwmgr *hwmgr,
+ enum PP_ODN_DPM_TABLE_TYPE type,
+ long *input, uint32_t size);
};
struct pp_table_func {
--
1.9.1
