and please fix patch #21 tile, which should be gfx9 not gfx8.
On 2018å¹´01æ??17æ?¥ 14:11, Chunming Zhou wrote:
> patch #19, #20, #21 are Reviewed-by: Chunming Zhou <david1.zhou at amd.com>
>
>
> On 2018å¹´01æ??17æ?¥ 03:40, Christian König wrote:
>> This way we can see the PASID in VM faults.
>>
>> Signed-off-by: Christian König <christian.koenig at amd.com>
>> ---
>> Â drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 12 +++++++++++-
>> Â 1 file changed, 11 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>> b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>> index f7bcfa53eff0..2efbecf486c5 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>> @@ -33,6 +33,7 @@
>> Â #include "vega10_enum.h"
>> Â #include "mmhub/mmhub_1_0_offset.h"
>> Â #include "athub/athub_1_0_offset.h"
>> +#include "oss/osssys_4_0_offset.h"
>> Â Â #include "soc15.h"
>> Â #include "soc15_common.h"
>> @@ -369,10 +370,12 @@ static uint64_t
>> gmc_v9_0_emit_flush_gpu_tlb(struct amdgpu_ring *ring,
>> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â unsigned vmid, unsigned pasid,
>> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â uint64_t pd_addr)
>> Â {
>> -Â Â Â struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs->vmhub];
>> +Â Â Â struct amdgpu_device *adev = ring->adev;
>> +Â Â Â struct amdgpu_vmhub *hub = &adev->vmhub[ring->funcs->vmhub];
>> Â Â Â Â Â uint32_t req = gmc_v9_0_get_invalidate_req(vmid);
>> Â Â Â Â Â uint64_t flags = AMDGPU_PTE_VALID;
>> Â Â Â Â Â unsigned eng = ring->vm_inv_eng;
>> +Â Â Â uint32_t reg;
>> Â Â Â Â Â Â amdgpu_gmc_get_vm_pde(ring->adev, -1, &pd_addr, &flags);
>> Â Â Â Â Â pd_addr |= flags;
>> @@ -383,6 +386,13 @@ static uint64_t
>> gmc_v9_0_emit_flush_gpu_tlb(struct amdgpu_ring *ring,
>> Â Â Â Â Â amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_hi32 + (2 * vmid),
>> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â upper_32_bits(pd_addr));
>> Â +Â Â Â if (ring->funcs->vmhub == AMDGPU_GFXHUB)
>> +Â Â Â Â Â Â Â reg = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_VMID_0_LUT) + vmid;
>> +Â Â Â else
>> +Â Â Â Â Â Â Â reg = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_VMID_0_LUT_MM) + vmid;
>> +
>> +Â Â Â amdgpu_ring_emit_wreg(ring, reg, pasid);
>> +
>> Â Â Â Â Â amdgpu_ring_emit_wreg(ring, hub->vm_inv_eng0_req + eng, req);
>> Â Â Â Â Â Â return pd_addr;
>
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