On Tue, Jan 16, 2018 at 7:02 AM, Rex Zhu <Rex.Zhu at amd.com> wrote:
> Change-Id: I46cdf4f39f4c9c448a2c76b67f1cbbfed26c7488
> Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
> ---
> drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h | 5 -----
> drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h | 6 ------
> drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h | 11 +++++++++++
> 3 files changed, 11 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h
> index 8eec974..1ce84cc 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h
> @@ -34,11 +34,6 @@
> #define SMU7_VOLTAGE_CONTROL_BY_SVID2 0x2
> #define SMU7_VOLTAGE_CONTROL_MERGED 0x3
>
> -#define DPMTABLE_OD_UPDATE_SCLK 0x00000001
> -#define DPMTABLE_OD_UPDATE_MCLK 0x00000002
> -#define DPMTABLE_UPDATE_SCLK 0x00000004
> -#define DPMTABLE_UPDATE_MCLK 0x00000008
> -
> enum gpu_pt_config_reg_type {
> GPU_CONFIGREG_MMR = 0,
> GPU_CONFIGREG_SMC_IND,
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h
> index 689fe9f..ab3e879 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h
> @@ -189,12 +189,6 @@ struct vega10_vbios_boot_state {
> uint32_t dcef_clock;
> };
>
> -#define DPMTABLE_OD_UPDATE_SCLK 0x00000001
> -#define DPMTABLE_OD_UPDATE_MCLK 0x00000002
> -#define DPMTABLE_UPDATE_SCLK 0x00000004
> -#define DPMTABLE_UPDATE_MCLK 0x00000008
> -#define DPMTABLE_OD_UPDATE_VDDC 0x00000010
> -
> struct vega10_smc_state_table {
> uint32_t soc_boot_level;
> uint32_t gfx_boot_level;
> diff --git a/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h b/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h
> index 97d25cd..d846cbb 100644
> --- a/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h
> +++ b/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h
> @@ -358,6 +358,17 @@ struct phm_clocks {
> uint32_t clock[MAX_NUM_CLOCKS];
> };
>
> +#define DPMTABLE_OD_UPDATE_SCLK 0x00000001
> +#define DPMTABLE_OD_UPDATE_MCLK 0x00000002
> +#define DPMTABLE_UPDATE_SCLK 0x00000004
> +#define DPMTABLE_UPDATE_MCLK 0x00000008
> +#define DPMTABLE_OD_UPDATE_VDDC 0x00000010
> +
> +/* To determine if sclk and mclk are in overdrive state */
> +#define SCLK_OVERDRIVE_ENABLED 0x00000001
> +#define MCLK_OVERDRIVE_ENABLED 0x00000002
> +#define VDDC_OVERDRIVE_ENABLED 0x00000010
> +
> struct phm_odn_performance_level {
> uint32_t clock;
> uint32_t vddc;
> --
> 1.9.1
>
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