Needed to flush and invalidate the HDP block using the CPU.
v2: use preferred register on soc15.
Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
Signed-off-by: Samuel Li <Samuel.Li at amd.com> (v1)
---
drivers/gpu/drm/amd/amdgpu/soc15.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 8f2cff7b7e0c..717bec98e279 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -583,6 +583,16 @@ static uint32_t soc15_get_rev_id(struct amdgpu_device *adev)
return adev->nbio_funcs->get_rev_id(adev);
}
+static void soc15_flush_hdp(struct amdgpu_device *adev)
+{
+ adev->nbio_funcs->hdp_flush(adev);
+}
+
+static void soc15_invalidate_hdp(struct amdgpu_device *adev)
+{
+ WREG32_SOC15_NO_KIQ(NBIO, 0, mmHDP_READ_CACHE_INVALIDATE, 1);
+}
+
static const struct amdgpu_asic_funcs soc15_asic_funcs =
{
.read_disabled_bios = &soc15_read_disabled_bios,
@@ -594,6 +604,8 @@ static const struct amdgpu_asic_funcs soc15_asic_funcs =
.set_uvd_clocks = &soc15_set_uvd_clocks,
.set_vce_clocks = &soc15_set_vce_clocks,
.get_config_memsize = &soc15_get_config_memsize,
+ .flush_hdp = &soc15_flush_hdp,
+ .invalidate_hdp = &soc15_invalidate_hdp,
};
static int soc15_common_early_init(void *handle)
--
2.13.6
