[PATCH] drm/amdgpu: correct reference clock value on vega10

[Ken.Wang@xxxxxxx (Ken.Wang at amd.com)]

From: Ken Wang <Ken.Wang@xxxxxxx>

Change-Id: I377029075af1e2e002f7cfd793ddd58d8610e474
Signed-off-by: Ken Wang <Ken.Wang at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/soc15.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 7839677..631b1e3 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -280,7 +280,7 @@ static void soc15_init_golden_registers(struct amdgpu_device *adev)
 static u32 soc15_get_xclk(struct amdgpu_device *adev)
 {
 	if (adev->asic_type == CHIP_VEGA10)
-		return adev->clock.spll.reference_freq/4;
+		return 27000;
 	else
 		return adev->clock.spll.reference_freq;
 }
-- 
2.7.4