On 09/20/2017 02:22 PM, Evan Quan wrote:
> Change-Id: Ia41bf64501557723fa811ad98a7b5630f12d9ed8
> Signed-off-by: Evan Quan <evan.quan at amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang at amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> index fd7c72a..2b2316a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> @@ -89,7 +89,7 @@ static const u32 golden_settings_sdma_vg10[] = {
>
> static const u32 golden_settings_sdma_4_1[] =
> {
> - SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_CHICKEN_BITS), 0xfe931f07, 0x02831f07,
> + SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_CHICKEN_BITS), 0xfe931f07, 0x02831d07,
> SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_CLK_CTRL), 0xffffffff, 0x3f000100,
> SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_GFX_IB_CNTL), 0x800f0111, 0x00000100,
> SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_GFX_RB_WPTR_POLL_CNTL), 0xfffffff7, 0x00403000,
>
