[PATCH 10/18] drm/amdgpu:hdp flush should be put it initialized

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Am 18.09.2017 um 08:11 schrieb Monk Liu:
> Change-Id: I635271ba4c89189017daa302a7fe5cd65c3eef06
> Signed-off-by: Monk Liu <Monk.Liu at amd.com>

Acked-by: Christian König <christian.koenig at amd.com>

> ---
>   drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 12 ++++++------
>   1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index 7a20ba8..3d035a6 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -696,12 +696,6 @@ static int gmc_v9_0_gart_enable(struct amdgpu_device *adev)
>   	if (r)
>   		return r;
>   
> -	/* After HDP is initialized, flush HDP.*/
> -	if (adev->flags & AMD_IS_APU)
> -		nbio_v7_0_hdp_flush(adev);
> -	else
> -		nbio_v6_1_hdp_flush(adev);
> -
>   	switch (adev->asic_type) {
>   	case CHIP_RAVEN:
>   		mmhub_v1_0_initialize_power_gating(adev);
> @@ -724,6 +718,12 @@ static int gmc_v9_0_gart_enable(struct amdgpu_device *adev)
>   	tmp = RREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL);
>   	WREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL, tmp);
>   
> +	/* After HDP is initialized, flush HDP.*/
> +	if (adev->flags & AMD_IS_APU)
> +		nbio_v7_0_hdp_flush(adev);
> +	else
> +		nbio_v6_1_hdp_flush(adev);
> +
>   	if (amdgpu_vm_fault_stop == AMDGPU_VM_FAULT_STOP_ALWAYS)
>   		value = false;
>   	else




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