got it, I will send another patch for reviewing.
________________________________
From: Alex Deucher <alexdeucher@xxxxxxxxx>
Sent: Wednesday, October 11, 2017 9:30:01 PM
To: Wang, Ken
Cc: amd-gfx at lists.freedesktop.org; Deucher, Alexander
Subject: Re: [PATCH] drm/amdgpu: correct reference clock value on vega10
On Wed, Oct 11, 2017 at 4:48 AM, Wang, Ken <Ken.Wang at amd.com> wrote:
> From: Ken Wang <Ken.Wang at amd.com>
>
> Change-Id: I377029075af1e2e002f7cfd793ddd58d8610e474
> Signed-off-by: Ken Wang <Ken.Wang at amd.com>
NAK. We use 10khz units for all other asics. We already multiply
this by 10 in amdgpu_kms.c before sending it to userspace:
/* return all clocks in KHz */
dev_info.gpu_counter_freq = amdgpu_asic_get_xclk(adev) * 10;
Just return adev->clock.spll.reference_freq.
Alex
> ---
> drivers/gpu/drm/amd/amdgpu/soc15.c | 6 ++----
> 1 file changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c
> b/drivers/gpu/drm/amd/amdgpu/soc15.c
> index 7839677..a510c8c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/soc15.c
> +++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
> @@ -279,10 +279,8 @@ static void soc15_init_golden_registers(struct
> amdgpu_device *adev)
> }
> static u32 soc15_get_xclk(struct amdgpu_device *adev)
> {
> - if (adev->asic_type == CHIP_VEGA10)
> - return adev->clock.spll.reference_freq/4;
> - else
> - return adev->clock.spll.reference_freq;
> + /* return the value in Khz instead of 10Khz*/
> + return adev->clock.spll.reference_freq * 10;
> }
>
>
> --
> 2.7.4
>
>
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