From: Charlene Liu <charlene.liu@xxxxxxx>
Signed-off-by: Charlene Liu <charlene.liu at amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac at amd.com>
Acked-by: Harry Wentland <Harry.Wentland at amd.com>
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c | 1 +
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.c | 3 +++
3 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index defc44393b38..4c47a489c87a 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -217,7 +217,7 @@ struct dc_debug {
bool force_abm_enable;
bool disable_hbup_pg;
bool disable_dpp_pg;
- bool stereo_support;
+ bool disable_stereo_support;
bool vsr_support;
};
struct dc_state;
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
index 1b108ae2e656..f168335e95bf 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
@@ -428,6 +428,7 @@ static const struct dc_debug debug_defaults_drv = {
.pipe_split_policy = MPC_SPLIT_AVOID_MULT_DISP,
.disable_dcc = DCC_ENABLE,
.voltage_align_fclk = true,
+ .disable_stereo_support = true,
.vsr_support = true,
};
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.c
index 178dadda74f9..1994865d4351 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.c
@@ -499,6 +499,9 @@ static bool tgn10_validate_timing(
timing->timing_3d_format != TIMING_3D_FORMAT_INBAND_FA)
return false;
+ if (timing->timing_3d_format != TIMING_3D_FORMAT_NONE &&
+ tg->ctx->dc->debug.disable_stereo_support)
+ return false;
/* Temporarily blocking interlacing mode until it's supported */
if (timing->flags.INTERLACE == 1)
return false;
--
2.14.1
