[PATCH 30/31] drm/amd/display: Remove unused addr var in TG

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Change-Id: I3a2032942816f66fc8a89ea0911d3cac3d187d19
Signed-off-by: Harry Wentland <harry.wentland at amd.com>
Reviewed-by: Sun peng Li <Sunpeng.Li at amd.com>
Reviewed-by: Roman Li <Roman.Li at amd.com>
Acked-by: Harry Wentland <Harry.Wentland at amd.com>
---
 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c | 7 -------
 1 file changed, 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c b/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
index c208196864ad..03b21e9a1156 100644
--- a/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
+++ b/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
@@ -386,34 +386,27 @@ bool dce120_timing_generator_did_triggered_reset_occur(
 /* Move to enable accelerated mode */
 void dce120_timing_generator_disable_vga(struct timing_generator *tg)
 {
-	uint32_t addr = 0;
 	uint32_t offset = 0;
 	uint32_t value = 0;
 	struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg);
 
 	switch (tg110->controller_id) {
 	case CONTROLLER_ID_D0:
-		addr = mmD1VGA_CONTROL;
 		offset = 0;
 		break;
 	case CONTROLLER_ID_D1:
-		addr = mmD2VGA_CONTROL;
 		offset = mmD2VGA_CONTROL - mmD1VGA_CONTROL;
 		break;
 	case CONTROLLER_ID_D2:
-		addr = mmD3VGA_CONTROL;
 		offset = mmD3VGA_CONTROL - mmD1VGA_CONTROL;
 		break;
 	case CONTROLLER_ID_D3:
-		addr = mmD4VGA_CONTROL;
 		offset = mmD4VGA_CONTROL - mmD1VGA_CONTROL;
 		break;
 	case CONTROLLER_ID_D4:
-		addr = mmD1VGA_CONTROL;
 		offset = mmD5VGA_CONTROL - mmD1VGA_CONTROL;
 		break;
 	case CONTROLLER_ID_D5:
-		addr = mmD6VGA_CONTROL;
 		offset = mmD6VGA_CONTROL - mmD1VGA_CONTROL;
 		break;
 	default:
-- 
2.11.0



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