On Thu, May 18, 2017 at 8:24 AM, Christian König
<deathsimple at vodafone.de> wrote:
> From: Christian König <christian.koenig at amd.com>
>
> The DPB must be in VRAM, but not in the first segment.
>
> Signed-off-by: Christian König <christian.koenig at amd.com>
> Tested-by: Arthur Marsh <arthur.marsh at internode.on.net>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
> ---
> drivers/gpu/drm/radeon/radeon_uvd.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/radeon/radeon_uvd.c b/drivers/gpu/drm/radeon/radeon_uvd.c
> index fad4a11..0cd0e7b 100644
> --- a/drivers/gpu/drm/radeon/radeon_uvd.c
> +++ b/drivers/gpu/drm/radeon/radeon_uvd.c
> @@ -621,7 +621,7 @@ static int radeon_uvd_cs_reloc(struct radeon_cs_parser *p,
> }
>
> /* TODO: is this still necessary on NI+ ? */
> - if ((cmd == 0 || cmd == 1 || cmd == 0x3) &&
> + if ((cmd == 0 || cmd == 0x3) &&
> (start >> 28) != (p->rdev->uvd.gpu_addr >> 28)) {
> DRM_ERROR("msg/fb buffer %LX-%LX out of 256MB segment!\n",
> start, end);
> --
> 2.7.4
>
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