Currently, ROCm requires CPUs that support PCIe atomics. The message is more urgent for GPGPU users, meaning basic functionalities of ROCm are not available on the node. Signed-off-by: Daisuke Matsuda <matsuda-daisuke@xxxxxxxxxxx> --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 ++-- drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c index 018dfccd771b..faeef136e272 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c @@ -4374,7 +4374,7 @@ int amdgpu_device_init(struct amdgpu_device *adev, return r; } - /* enable PCIE atomic ops */ + /* enable PCIe atomic ops */ if (amdgpu_sriov_vf(adev)) { if (adev->virt.fw_reserve.p_pf2vf) adev->have_atomics_support = ((struct amd_sriov_msg_pf2vf_info *) @@ -4395,7 +4395,7 @@ int amdgpu_device_init(struct amdgpu_device *adev, } if (!adev->have_atomics_support) - dev_info(adev->dev, "PCIE atomic ops is not supported\n"); + dev_warn(adev->dev, "PCIe atomic ops are not supported\n"); /* doorbell bar mapping and doorbell index init*/ amdgpu_doorbell_init(adev); diff --git a/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h b/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h index b4f9c2f4e92c..c52605a07597 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h @@ -240,7 +240,7 @@ struct amd_sriov_msg_pf2vf_info { } mm_bw_management[AMD_SRIOV_MSG_RESERVE_VCN_INST]; /* UUID info */ struct amd_sriov_msg_uuid_info uuid_info; - /* PCIE atomic ops support flag */ + /* PCIe atomic ops support flag */ uint32_t pcie_atomic_ops_support_flags; /* Portion of GPU memory occupied by VF. MAX value is 65535, but set to uint32_t to maintain alignment with reserved size */ uint32_t gpu_capacity; -- 2.39.1