Applied this series with some minor changes.
Thanks!
Alex
On Thu, Feb 27, 2025 at 12:14 AM Alexandre Demers
<alexandre.f.demers@xxxxxxxxx> wrote:
>
> Fix typos
>
> Signed-off-by: Alexandre Demers <alexandre.f.demers@xxxxxxxxx>
> ---
> drivers/gpu/drm/amd/amdgpu/si.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c
> index d1c06d0d6a2d..68f6f4ec8a47 100644
> --- a/drivers/gpu/drm/amd/amdgpu/si.c
> +++ b/drivers/gpu/drm/amd/amdgpu/si.c
> @@ -919,7 +919,7 @@ static const u32 hainan_mgcg_cgcg_init[] =
>
> /* XXX: update when we support VCE */
> #if 0
> -/* tahiti, pitcarin, verde */
> +/* tahiti, pitcairn, verde */
> static const struct amdgpu_video_codec_info tahiti_video_codecs_encode_array[] =
> {
> {
> @@ -950,7 +950,7 @@ static const struct amdgpu_video_codecs hainan_video_codecs_encode =
> .codec_array = NULL,
> };
>
> -/* tahiti, pitcarin, verde, oland */
> +/* tahiti, pitcairn, verde, oland */
> static const struct amdgpu_video_codec_info tahiti_video_codecs_decode_array[] =
> {
> {
> @@ -1898,7 +1898,7 @@ static int si_vce_send_vcepll_ctlreq(struct amdgpu_device *adev)
> WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, 0, ~UPLL_CTLREQ_MASK);
>
> if (i == SI_MAX_CTLACKS_ASSERTION_WAIT) {
> - DRM_ERROR("Timeout setting UVD clocks!\n");
> + DRM_ERROR("Timeout setting VCE clocks!\n");
> return -ETIMEDOUT;
> }
>
> --
> 2.48.1
>
