[AMD Official Use Only - AMD Internal Distribution Only] Series is Reviewed-by: Hawking Zhang <Hawking.Zhang@xxxxxxx> Regards, Hawking -----Original Message----- From: Lazar, Lijo <Lijo.Lazar@xxxxxxx> Sent: Friday, February 21, 2025 23:23 To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx Cc: Zhang, Hawking <Hawking.Zhang@xxxxxxx>; Deucher, Alexander <Alexander.Deucher@xxxxxxx>; Liu, Leo <Leo.Liu@xxxxxxx>; Sundararaju, Sathishkumar <Sathishkumar.Sundararaju@xxxxxxx> Subject: [PATCH 1/2] drm/amdgpu: Initialize RRMT status on JPEG v5.0.1 Initialize RRMT enablement status from register. Signed-off-by: Lijo Lazar <lijo.lazar@xxxxxxx> --- drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c | 3 +++ drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.h | 5 ++++- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c index 5d4e2a09acca..0d63af6ac68e 100644 --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c @@ -239,6 +239,9 @@ static int jpeg_v5_0_1_hw_init(struct amdgpu_ip_block *ip_block) } return 0; } + if (RREG32_SOC15(VCN, GET_INST(VCN, 0), regVCN_RRMT_CNTL) & 0x100) + adev->jpeg.caps |= AMDGPU_JPEG_CAPS(RRMT_ENABLED); + for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) { jpeg_inst = GET_INST(JPEG, i); ring = adev->jpeg.inst[i].ring_dec; diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.h b/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.h index 9de3272ef47f..ea1105b11705 100644 --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.h +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.h @@ -87,4 +87,7 @@ extern const struct amdgpu_ip_block_version jpeg_v5_0_1_ip_block; #define regUVD_JRBC9_UVD_JRBC_RB_RPTR 0x044a #define regUVD_JRBC9_UVD_JRBC_RB_RPTR_BASE_IDX 1 -#endif /* __JPEG_V5_0_0_H__ */ +#define regVCN_RRMT_CNTL 0x0940 +#define regVCN_RRMT_CNTL_BASE_IDX 1 + +#endif /* __JPEG_V5_0_1_H__ */ -- 2.25.1