> -----Original Message----- > From: amd-gfx [mailto:amd-gfx-bounces at lists.freedesktop.org] On Behalf > Of Christian König > Sent: Thursday, May 11, 2017 10:22 AM > To: amd-gfx at lists.freedesktop.org > Subject: [PATCH] drm/amdgpu: cleanup VM manager init/fini > > From: Christian König <christian.koenig at amd.com> > > VM is mandatory for all hw amdgpu supports. So remove the leftovers > to make it optionally. > > Signed-off-by: Christian König <christian.koenig at amd.com> Reviewed-by: Alex Deucher <alexander.deucher at amd.com> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 3 -- > drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 2 - > drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 59 ++++++++---------------- > drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 82 ++++++++------------------- > ------ > drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 82 ++++++++------------------- > ------ > drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 80 ++++++++------------------- > ----- > 6 files changed, 78 insertions(+), 230 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c > b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c > index 6778ea5..c8b037a 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c > @@ -571,9 +571,6 @@ int amdgpu_gem_va_ioctl(struct drm_device *dev, > void *data, > uint64_t va_flags; > int r = 0; > > - if (!adev->vm_manager.enabled) > - return -ENOTTY; > - > if (args->va_address < AMDGPU_VA_RESERVED_SIZE) { > dev_err(&dev->pdev->dev, > "va_address 0x%lX is in reserved area 0x%X\n", > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h > b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h > index 27546df..afe9073 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h > @@ -173,8 +173,6 @@ struct amdgpu_vm_manager { > uint32_t block_size; > /* vram base address for page table entry */ > u64 vram_base_offset; > - /* is vm enabled? */ > - bool enabled; > /* vm pte handling */ > const struct amdgpu_vm_pte_funcs *vm_pte_funcs; > struct amdgpu_ring > *vm_pte_rings[AMDGPU_MAX_RINGS]; > diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c > b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c > index d860939..1e6263a 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c > @@ -614,33 +614,6 @@ static void gmc_v6_0_gart_fini(struct > amdgpu_device *adev) > amdgpu_gart_fini(adev); > } > > -static int gmc_v6_0_vm_init(struct amdgpu_device *adev) > -{ > - /* > - * number of VMs > - * VMID 0 is reserved for System > - * amdgpu graphics/compute will use VMIDs 1-7 > - * amdkfd will use VMIDs 8-15 > - */ > - adev->vm_manager.id_mgr[0].num_ids = > AMDGPU_NUM_OF_VMIDS; > - adev->vm_manager.num_level = 1; > - amdgpu_vm_manager_init(adev); > - > - /* base offset of vram pages */ > - if (adev->flags & AMD_IS_APU) { > - u64 tmp = RREG32(mmMC_VM_FB_OFFSET); > - tmp <<= 22; > - adev->vm_manager.vram_base_offset = tmp; > - } else > - adev->vm_manager.vram_base_offset = 0; > - > - return 0; > -} > - > -static void gmc_v6_0_vm_fini(struct amdgpu_device *adev) > -{ > -} > - > static void gmc_v6_0_vm_decode_fault(struct amdgpu_device *adev, > u32 status, u32 addr, u32 mc_client) > { > @@ -887,26 +860,34 @@ static int gmc_v6_0_sw_init(void *handle) > if (r) > return r; > > - if (!adev->vm_manager.enabled) { > - r = gmc_v6_0_vm_init(adev); > - if (r) { > - dev_err(adev->dev, "vm manager initialization failed > (%d).\n", r); > - return r; > - } > - adev->vm_manager.enabled = true; > + /* > + * number of VMs > + * VMID 0 is reserved for System > + * amdgpu graphics/compute will use VMIDs 1-7 > + * amdkfd will use VMIDs 8-15 > + */ > + adev->vm_manager.id_mgr[0].num_ids = > AMDGPU_NUM_OF_VMIDS; > + adev->vm_manager.num_level = 1; > + amdgpu_vm_manager_init(adev); > + > + /* base offset of vram pages */ > + if (adev->flags & AMD_IS_APU) { > + u64 tmp = RREG32(mmMC_VM_FB_OFFSET); > + > + tmp <<= 22; > + adev->vm_manager.vram_base_offset = tmp; > + } else { > + adev->vm_manager.vram_base_offset = 0; > } > > - return r; > + return 0; > } > > static int gmc_v6_0_sw_fini(void *handle) > { > struct amdgpu_device *adev = (struct amdgpu_device *)handle; > > - if (adev->vm_manager.enabled) { > - gmc_v6_0_vm_fini(adev); > - adev->vm_manager.enabled = false; > - } > + amdgpu_vm_manager_fini(adev); > gmc_v6_0_gart_fini(adev); > amdgpu_gem_force_release(adev); > amdgpu_bo_fini(adev); > diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c > b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c > index 2750e5c..967505b 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c > @@ -724,55 +724,6 @@ static void gmc_v7_0_gart_fini(struct > amdgpu_device *adev) > amdgpu_gart_fini(adev); > } > > -/* > - * vm > - * VMID 0 is the physical GPU addresses as used by the kernel. > - * VMIDs 1-15 are used for userspace clients and are handled > - * by the amdgpu vm/hsa code. > - */ > -/** > - * gmc_v7_0_vm_init - cik vm init callback > - * > - * @adev: amdgpu_device pointer > - * > - * Inits cik specific vm parameters (number of VMs, base of vram for > - * VMIDs 1-15) (CIK). > - * Returns 0 for success. > - */ > -static int gmc_v7_0_vm_init(struct amdgpu_device *adev) > -{ > - /* > - * number of VMs > - * VMID 0 is reserved for System > - * amdgpu graphics/compute will use VMIDs 1-7 > - * amdkfd will use VMIDs 8-15 > - */ > - adev->vm_manager.id_mgr[0].num_ids = > AMDGPU_NUM_OF_VMIDS; > - adev->vm_manager.num_level = 1; > - amdgpu_vm_manager_init(adev); > - > - /* base offset of vram pages */ > - if (adev->flags & AMD_IS_APU) { > - u64 tmp = RREG32(mmMC_VM_FB_OFFSET); > - tmp <<= 22; > - adev->vm_manager.vram_base_offset = tmp; > - } else > - adev->vm_manager.vram_base_offset = 0; > - > - return 0; > -} > - > -/** > - * gmc_v7_0_vm_fini - cik vm fini callback > - * > - * @adev: amdgpu_device pointer > - * > - * Tear down any asic specific VM setup (CIK). > - */ > -static void gmc_v7_0_vm_fini(struct amdgpu_device *adev) > -{ > -} > - > /** > * gmc_v7_0_vm_decode_fault - print human readable fault info > * > @@ -1051,27 +1002,34 @@ static int gmc_v7_0_sw_init(void *handle) > if (r) > return r; > > - if (!adev->vm_manager.enabled) { > - r = gmc_v7_0_vm_init(adev); > - if (r) { > - dev_err(adev->dev, "vm manager initialization failed > (%d).\n", r); > - return r; > - } > - adev->vm_manager.enabled = true; > + /* > + * number of VMs > + * VMID 0 is reserved for System > + * amdgpu graphics/compute will use VMIDs 1-7 > + * amdkfd will use VMIDs 8-15 > + */ > + adev->vm_manager.id_mgr[0].num_ids = > AMDGPU_NUM_OF_VMIDS; > + adev->vm_manager.num_level = 1; > + amdgpu_vm_manager_init(adev); > + > + /* base offset of vram pages */ > + if (adev->flags & AMD_IS_APU) { > + u64 tmp = RREG32(mmMC_VM_FB_OFFSET); > + > + tmp <<= 22; > + adev->vm_manager.vram_base_offset = tmp; > + } else { > + adev->vm_manager.vram_base_offset = 0; > } > > - return r; > + return 0; > } > > static int gmc_v7_0_sw_fini(void *handle) > { > struct amdgpu_device *adev = (struct amdgpu_device *)handle; > > - if (adev->vm_manager.enabled) { > - amdgpu_vm_manager_fini(adev); > - gmc_v7_0_vm_fini(adev); > - adev->vm_manager.enabled = false; > - } > + amdgpu_vm_manager_fini(adev); > gmc_v7_0_gart_fini(adev); > amdgpu_gem_force_release(adev); > amdgpu_bo_fini(adev); > diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c > b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c > index f56b408..3b5ea0f 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c > @@ -927,55 +927,6 @@ static void gmc_v8_0_gart_fini(struct > amdgpu_device *adev) > amdgpu_gart_fini(adev); > } > > -/* > - * vm > - * VMID 0 is the physical GPU addresses as used by the kernel. > - * VMIDs 1-15 are used for userspace clients and are handled > - * by the amdgpu vm/hsa code. > - */ > -/** > - * gmc_v8_0_vm_init - cik vm init callback > - * > - * @adev: amdgpu_device pointer > - * > - * Inits cik specific vm parameters (number of VMs, base of vram for > - * VMIDs 1-15) (CIK). > - * Returns 0 for success. > - */ > -static int gmc_v8_0_vm_init(struct amdgpu_device *adev) > -{ > - /* > - * number of VMs > - * VMID 0 is reserved for System > - * amdgpu graphics/compute will use VMIDs 1-7 > - * amdkfd will use VMIDs 8-15 > - */ > - adev->vm_manager.id_mgr[0].num_ids = > AMDGPU_NUM_OF_VMIDS; > - adev->vm_manager.num_level = 1; > - amdgpu_vm_manager_init(adev); > - > - /* base offset of vram pages */ > - if (adev->flags & AMD_IS_APU) { > - u64 tmp = RREG32(mmMC_VM_FB_OFFSET); > - tmp <<= 22; > - adev->vm_manager.vram_base_offset = tmp; > - } else > - adev->vm_manager.vram_base_offset = 0; > - > - return 0; > -} > - > -/** > - * gmc_v8_0_vm_fini - cik vm fini callback > - * > - * @adev: amdgpu_device pointer > - * > - * Tear down any asic specific VM setup (CIK). > - */ > -static void gmc_v8_0_vm_fini(struct amdgpu_device *adev) > -{ > -} > - > /** > * gmc_v8_0_vm_decode_fault - print human readable fault info > * > @@ -1135,27 +1086,34 @@ static int gmc_v8_0_sw_init(void *handle) > if (r) > return r; > > - if (!adev->vm_manager.enabled) { > - r = gmc_v8_0_vm_init(adev); > - if (r) { > - dev_err(adev->dev, "vm manager initialization failed > (%d).\n", r); > - return r; > - } > - adev->vm_manager.enabled = true; > + /* > + * number of VMs > + * VMID 0 is reserved for System > + * amdgpu graphics/compute will use VMIDs 1-7 > + * amdkfd will use VMIDs 8-15 > + */ > + adev->vm_manager.id_mgr[0].num_ids = > AMDGPU_NUM_OF_VMIDS; > + adev->vm_manager.num_level = 1; > + amdgpu_vm_manager_init(adev); > + > + /* base offset of vram pages */ > + if (adev->flags & AMD_IS_APU) { > + u64 tmp = RREG32(mmMC_VM_FB_OFFSET); > + > + tmp <<= 22; > + adev->vm_manager.vram_base_offset = tmp; > + } else { > + adev->vm_manager.vram_base_offset = 0; > } > > - return r; > + return 0; > } > > static int gmc_v8_0_sw_fini(void *handle) > { > struct amdgpu_device *adev = (struct amdgpu_device *)handle; > > - if (adev->vm_manager.enabled) { > - amdgpu_vm_manager_fini(adev); > - gmc_v8_0_vm_fini(adev); > - adev->vm_manager.enabled = false; > - } > + amdgpu_vm_manager_fini(adev); > gmc_v8_0_gart_fini(adev); > amdgpu_gem_force_release(adev); > amdgpu_bo_fini(adev); > diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c > b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c > index 1bc8292..19e1027 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c > @@ -524,54 +524,6 @@ static int gmc_v9_0_gart_init(struct amdgpu_device > *adev) > return amdgpu_gart_table_vram_alloc(adev); > } > > -/* > - * vm > - * VMID 0 is the physical GPU addresses as used by the kernel. > - * VMIDs 1-15 are used for userspace clients and are handled > - * by the amdgpu vm/hsa code. > - */ > -/** > - * gmc_v9_0_vm_init - vm init callback > - * > - * @adev: amdgpu_device pointer > - * > - * Inits vega10 specific vm parameters (number of VMs, base of vram for > - * VMIDs 1-15) (vega10). > - * Returns 0 for success. > - */ > -static int gmc_v9_0_vm_init(struct amdgpu_device *adev) > -{ > - /* > - * number of VMs > - * VMID 0 is reserved for System > - * amdgpu graphics/compute will use VMIDs 1-7 > - * amdkfd will use VMIDs 8-15 > - */ > - adev->vm_manager.id_mgr[AMDGPU_GFXHUB].num_ids = > AMDGPU_NUM_OF_VMIDS; > - adev->vm_manager.id_mgr[AMDGPU_MMHUB].num_ids = > AMDGPU_NUM_OF_VMIDS; > - > - /* TODO: fix num_level for APU when updating vm size and block > size */ > - if (adev->flags & AMD_IS_APU) > - adev->vm_manager.num_level = 1; > - else > - adev->vm_manager.num_level = 3; > - amdgpu_vm_manager_init(adev); > - > - return 0; > -} > - > -/** > - * gmc_v9_0_vm_fini - vm fini callback > - * > - * @adev: amdgpu_device pointer > - * > - * Tear down any asic specific VM setup. > - */ > -static void gmc_v9_0_vm_fini(struct amdgpu_device *adev) > -{ > - return; > -} > - > static int gmc_v9_0_sw_init(void *handle) > { > int r; > @@ -647,15 +599,23 @@ static int gmc_v9_0_sw_init(void *handle) > if (r) > return r; > > - if (!adev->vm_manager.enabled) { > - r = gmc_v9_0_vm_init(adev); > - if (r) { > - dev_err(adev->dev, "vm manager initialization failed > (%d).\n", r); > - return r; > - } > - adev->vm_manager.enabled = true; > - } > - return r; > + /* > + * number of VMs > + * VMID 0 is reserved for System > + * amdgpu graphics/compute will use VMIDs 1-7 > + * amdkfd will use VMIDs 8-15 > + */ > + adev->vm_manager.id_mgr[AMDGPU_GFXHUB].num_ids = > AMDGPU_NUM_OF_VMIDS; > + adev->vm_manager.id_mgr[AMDGPU_MMHUB].num_ids = > AMDGPU_NUM_OF_VMIDS; > + > + /* TODO: fix num_level for APU when updating vm size and block > size */ > + if (adev->flags & AMD_IS_APU) > + adev->vm_manager.num_level = 1; > + else > + adev->vm_manager.num_level = 3; > + amdgpu_vm_manager_init(adev); > + > + return 0; > } > > /** > @@ -675,11 +635,7 @@ static int gmc_v9_0_sw_fini(void *handle) > { > struct amdgpu_device *adev = (struct amdgpu_device *)handle; > > - if (adev->vm_manager.enabled) { > - amdgpu_vm_manager_fini(adev); > - gmc_v9_0_vm_fini(adev); > - adev->vm_manager.enabled = false; > - } > + amdgpu_vm_manager_fini(adev); > gmc_v9_0_gart_fini(adev); > amdgpu_gem_force_release(adev); > amdgpu_bo_fini(adev); > -- > 2.7.4 > > _______________________________________________ > amd-gfx mailing list > amd-gfx at lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx
