[PATCH 000/117] Raven Support

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Am 10.05.2017 um 20:45 schrieb Alex Deucher:
> This patch set adds support for the new "Raven" APU.
>
> The first 12 patches add support for the new ACP
> audio hardware on Raven. Patches 11 and 12 are not
> meant for upstream, they are for early hardware testing.
> The rest add GPU support.  Patches 17-24 are register
> headers (which are relatively large), so I'm not sending
> them out.
>
> You can view the whole patch set here:
> https://cgit.freedesktop.org/~agd5f/linux/log/?h=raven

Patches #1-#13 are Acked-by: Christian König <christian.koenig at amd.com>.

Patches #14-#16 are Reviewed-by: Christian König <christian.koenig at amd.com>.

Patches #17-#25 are somehow missing on the mailing lists at the moment.

Going to take a look at the rest tomorrow.

Christian.

>
> Alex Deucher (12):
>    drm/amdgpu: add gpu_info firmware (v3)
>    drm/amdgpu: parse the gpu_info firmware (v4)
>    drm/amdgpu/gfx9: drop duplicate gfx info init (v3)
>    drm/amdgpu: add register headers for DCN 1.0
>    drm/amdgpu: add register headers for GC 9.1
>    drm/amdgpu: add register headers for MMHUB 9.1
>    drm/amdgpu: add register headers for MP 10.0
>    drm/amdgpu: add register headers for NBIO 7.0
>    drm/amdgpu: add register headers for SDMA 4.1
>    drm/amdgpu: add register headers for THM 10.0
>    drm/amdgpu: add register headers for VCN 1.0
>    drm/amdgpu/raven: power up/down VCN via the SMU (v2)
>
> Andrey Grodzovsky (1):
>    drm/amd: Add DCN ivsrcids (v2)
>
> Chunming Zhou (17):
>    drm/amdgpu: add RAVEN family id definition
>    drm/amdgpu: add Raven ip blocks
>    drm/amdgpu/soc15: add Raven golden setting
>    drm/amdgpu: add Raven chip id case for ucode
>    drm/amdgpu: add module firmware for raven
>    drm/amdgpu: add gc9.1 golden setting (v2)
>    drm/amdgpu/gfx9: add chip name for raven when initializing microcode
>    drm/amdgpu/gfx9: add raven gfx config
>    drm/amdgpu: add raven case for gmc9 golden setting
>    drm/amdgpu/gmc9: set mc vm fb offset for raven
>    drm/amdgpu/gmc9: change fb offset sequence so that used wider
>    drm/amdgpu: add Raven sdma golden setting and chip id case
>    drm/amdgpu: add nbio7 support
>    drm/amdgpu: apply nbio7 for Raven (v3)
>    drm/amd/powerplay/rv: power up/down sdma via the SMU
>    drm/amdgpu/powerplay/raven: add smu block and enable powerplay
>    drm/amdgpu: add RAVEN pci id
>
> Harry Wentland (7):
>    drm/amdgpu/display: Add calcs code for DCN
>    drm/amdgpu/display: Add core dc support for DCN
>    drm/amdgpu/display: Add dml support for DCN
>    drm/amdgpu/display: Add gpio support for DCN
>    drm/amdgpu/display: Add i2c/aux support for DCN
>    drm/amdgpu/display: Add irq support for DCN
>    drm/amdgpu/display: Enable DCN in DC
>
> Hawking Zhang (13):
>    drm/amd/amdgpu: fill in raven case in soc15 early init
>    drm/amdgpu/gfx9: extend rlc fw setup
>    drm/amdgpu/gfx9: enable cp interrupt for CGCG/CGLS/MGCG
>    drm/amdgpu: correct gfx9 csb size
>    drm/amdgpu/gfx9: add rlc bo init/fini
>    drm/amdgpu/gfx9: rlc save&restore list programming
>    drm/amdgpu: init gfx power gating on raven
>    drm/amdgpu/gfx9: enable/disable sck slowdown thru rlc-smu handshake
>    drm/amdgpu/gfx9: add enable/disable funcs for cp power gating
>    drm/amdgpu/gfx9: allow updating sck slowdown and cp pg state
>    drm/amdgpu/gfx9: allow updating gfx cgpg state
>    drm/amdgpu/gfx9: allow updating gfx mgpg state
>    drm/amdgpu: enable dcn1.0 dc support on raven
>
> Huang Rui (17):
>    drm/amdgpu/soc15: add clock gating functions for raven
>    drm/amdgpu: enable soc15 clock gating flags for raven
>    drm/amdgpu: add gfx clock gating for raven
>    drm/amdgpu: add raven clock gating and light sleep for mmhub
>    drm/amdgpu: enable MC MGCG and LS for raven
>    drm/amdgpu: reuse sdma v4 MGCG and LS function for raven
>    drm/amdgpu: enable sdma v4 MGCG and LS for raven
>    drm/amdgpu: init sdma power gating for raven
>    drm/amdgpu/sdma4: add dynamic power gating for raven
>    drm/amdgpu: enable sdma power gating for raven
>    drm/amdgpu: add nbio MGCG for raven
>    drm/amdgpu: add psp v10 function callback for raven
>    drm/amdgpu: add psp v10 ip block
>    drm/amdgpu: register the psp v10 function pointers at psp sw_init
>    drm/amdgpu/soc15: add psp ip block
>    drm/amdgpu/vcn: add sw clock gating
>    drm/amdgpu: enable sw clock gating for vcn
>
> Leo Liu (32):
>    drm/amdgpu: add initial vcn support and decode tests
>    drm/amdgpu: add encode tests for vcn
>    drm/amdgpu: add vcn ip block functions (v2)
>    drm/amdgpu: add vcn decode ring support
>    drm/amdgpu: add vcn decode ring type and functions
>    drm/amdgpu: add vcn irq functions
>    drm/amdgpu: add vcn ip block and type
>    drm/amdgpu: move amdgpu_vcn structure to vcn header
>    drm/amdgpu: re-group the functions in amdgpu_vcn.c
>    drm/amdgpu: move vcn ring test to amdgpu_vcn.c
>    drm/amdgpu: expose vcn RB command
>    drm/amdgpu: add a ring func for vcn start command
>    drm/amdgpu: implement vcn start RB command
>    drm/amdgpu: implement insert end ring function for vcn decode
>    drm/amdgpu/vcn: implement ib tests with new message buffer interface
>    uapi/drm: add AMDGPU_HW_IP_VCN_DEC for decode CS
>    uapi/drm: add AMDGPU_HW_IP_VCN_ENC for encode CS
>    drm/amdgpu: add AMDGPU_HW_IP_VCN_DEC to info query
>    drm/amdgpu: get cs support of AMDGPU_HW_IP_VCN_DEC
>    drm/amdgpu: Disable uvd and vce free handles for raven
>    drm/amdgpu: implement new vcn cache window programming
>    drm/amdgpu: add vcn ip block to soc15
>    drm/amdgpu: change vcn dec rb command specific for decode
>    drm/amdgpu: add vcn enc rings
>    drm/amdgpu: add vcn enc ring type and functions
>    drm/amdgpu: add vcn enc irq support
>    drm/amdgpu: enable vcn encode ring tests
>    drm/amdgpu: add vcn enc ib test
>    drm/amdgpu: add AMDGPU_HW_IP_VCN_ENC to info query
>    drm/amdgpu: get cs support for AMDGPU_HW_IP_VCN_ENC
>    drm/amdgpu: add vcn firmware header offset
>    drm/amdgpu: update vcn decode create msg
>
> Maruthi Srinivas Bayyavarapu (12):
>    ASoC: AMD: add ACP 3.x IP register header
>    ASoC: AMD: add ACP3.0 PCI driver
>    ASoC: AMD: create ACP3x PCM platform device
>    ASoC: AMD: add ACP3x PCM platform driver
>    ASoC: AMD: handle ACP3x i2s watermark interrupt
>    ASoC: AMD: add ACP3x PCM driver DMA ops
>    ASoC: AMD: add ACP3x i2s ops
>    ASoC: AMD: add ACP3x TDM mode support
>    ASoC: AMD: Add ACP3x runtime pm ops
>    ASoC: AMD: Add ACP3x system resume pm op
>    ASoC: AMD: enable ACP3x drivers build
>    ASoC: AMD: create/add dummy codec and machine devices/drivers
>
> Rex Zhu (5):
>    drm/amdgpu/powerplay: add header file for smu10. (v2)
>    drm/amdgpu: add raven related define in pptable.h.
>    drm/amd/powerplay: add ppt_v3 define
>    drm/amd/powerplay: add raven support in smumgr. (v2)
>    drm/amd/powerplay: add raven support in hwmgr. (v2)
>
> Vijendar Mukunda (1):
>    soc/amd/raven: Disabling TDM mode flag
>
>   drivers/gpu/drm/amd/amdgpu/Makefile                |     10 +-
>   drivers/gpu/drm/amd/amdgpu/amdgpu.h                |     16 +-
>   drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c             |     12 +
>   drivers/gpu/drm/amd/amdgpu/amdgpu_device.c         |    111 +-
>   drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c            |      3 +
>   drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c             |      3 +
>   drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h             |      3 +-
>   drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c            |     23 +-
>   drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c      |      1 +
>   drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c            |     16 +
>   drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h            |      2 +
>   drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h           |      5 +-
>   drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c          |     30 +
>   drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h          |     25 +
>   drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c            |    654 +
>   drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h            |     77 +
>   drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c              |    793 +-
>   drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c           |      5 +
>   drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.h           |      2 +-
>   drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c              |     25 +-
>   drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c            |     50 +-
>   drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c             |    220 +
>   drivers/gpu/drm/amd/amdgpu/nbio_v7_0.h             |     49 +
>   drivers/gpu/drm/amd/amdgpu/psp_v10_0.c             |    309 +
>   drivers/gpu/drm/amd/amdgpu/psp_v10_0.h             |     41 +
>   drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c             |    128 +-
>   drivers/gpu/drm/amd/amdgpu/soc15.c                 |    103 +-
>   drivers/gpu/drm/amd/amdgpu/soc15.h                 |      1 +
>   drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c              |   1190 +
>   drivers/gpu/drm/amd/amdgpu/vcn_v1_0.h              |     29 +
>   drivers/gpu/drm/amd/amdgpu/vega10_ih.c             |     10 +-
>   drivers/gpu/drm/amd/display/Kconfig                |      7 +
>   drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c  |    167 +-
>   .../drm/amd/display/amdgpu_dm/amdgpu_dm_types.c    |      3 +-
>   drivers/gpu/drm/amd/display/dc/Makefile            |      5 +
>   .../amd/display/dc/bios/command_table_helper2.c    |      5 +
>   drivers/gpu/drm/amd/display/dc/calcs/Makefile      |      8 +
>   .../gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c   |   3629 +
>   .../gpu/drm/amd/display/dc/calcs/dcn_calc_auto.h   |     37 +
>   .../gpu/drm/amd/display/dc/calcs/dcn_calc_math.c   |    104 +
>   .../gpu/drm/amd/display/dc/calcs/dcn_calc_math.h   |     40 +
>   drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c   |   1366 +
>   drivers/gpu/drm/amd/display/dc/core/dc_resource.c  |     19 +
>   drivers/gpu/drm/amd/display/dc/dc.h                |     18 +
>   drivers/gpu/drm/amd/display/dc/dce/dce_abm.h       |     49 +
>   .../gpu/drm/amd/display/dc/dce/dce_clock_source.c  |     31 +
>   .../gpu/drm/amd/display/dc/dce/dce_clock_source.h  |     21 +
>   drivers/gpu/drm/amd/display/dc/dce/dce_clocks.c    |     15 +
>   drivers/gpu/drm/amd/display/dc/dce/dce_clocks.h    |      9 +
>   drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c      |    245 +
>   drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.h      |     21 +
>   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h     |     15 +
>   .../gpu/drm/amd/display/dc/dce/dce_link_encoder.h  |     16 +-
>   .../drm/amd/display/dc/dce/dce_stream_encoder.c    |    264 +
>   .../drm/amd/display/dc/dce/dce_stream_encoder.h    |     69 +
>   .../amd/display/dc/dce110/dce110_hw_sequencer.c    |     29 +
>   drivers/gpu/drm/amd/display/dc/dcn10/Makefile      |     10 +
>   .../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c  |   1866 +
>   .../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h  |     38 +
>   drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.c   |    883 +
>   drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h   |    549 +
>   .../gpu/drm/amd/display/dc/dcn10/dcn10_mem_input.c |   1102 +
>   .../gpu/drm/amd/display/dc/dcn10/dcn10_mem_input.h |    553 +
>   drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c   |    376 +
>   drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.h   |    135 +
>   drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c   |    801 +
>   drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.h   |    622 +
>   .../gpu/drm/amd/display/dc/dcn10/dcn10_resource.c  |   1475 +
>   .../gpu/drm/amd/display/dc/dcn10/dcn10_resource.h  |     47 +
>   .../amd/display/dc/dcn10/dcn10_timing_generator.c  |   1202 +
>   .../amd/display/dc/dcn10/dcn10_timing_generator.h  |    335 +
>   .../gpu/drm/amd/display/dc/dcn10/dcn10_transform.c |   1057 +
>   .../gpu/drm/amd/display/dc/dcn10/dcn10_transform.h |    416 +
>   drivers/gpu/drm/amd/display/dc/dm_services.h       |      4 +
>   drivers/gpu/drm/amd/display/dc/dm_services_types.h |      1 +
>   drivers/gpu/drm/amd/display/dc/dml/Makefile        |     22 +
>   drivers/gpu/drm/amd/display/dc/dml/dc_features.h   |    557 +
>   .../drm/amd/display/dc/dml/display_mode_enums.h    |    111 +
>   .../gpu/drm/amd/display/dc/dml/display_mode_lib.c  |    147 +
>   .../gpu/drm/amd/display/dc/dml/display_mode_lib.h  |     52 +
>   .../drm/amd/display/dc/dml/display_mode_structs.h  |    429 +
>   .../drm/amd/display/dc/dml/display_mode_support.c  |   2326 +
>   .../drm/amd/display/dc/dml/display_mode_support.h  |    199 +
>   .../drm/amd/display/dc/dml/display_pipe_clocks.c   |    367 +
>   .../drm/amd/display/dc/dml/display_pipe_clocks.h   |     41 +
>   .../drm/amd/display/dc/dml/display_rq_dlg_calc.c   |   2254 +
>   .../drm/amd/display/dc/dml/display_rq_dlg_calc.h   |    139 +
>   .../amd/display/dc/dml/display_rq_dlg_helpers.c    |    320 +
>   .../amd/display/dc/dml/display_rq_dlg_helpers.h    |     66 +
>   .../gpu/drm/amd/display/dc/dml/display_watermark.c |   1281 +
>   .../gpu/drm/amd/display/dc/dml/display_watermark.h |     98 +
>   .../gpu/drm/amd/display/dc/dml/dml_common_defs.c   |    148 +
>   .../gpu/drm/amd/display/dc/dml/dml_common_defs.h   |     51 +
>   .../gpu/drm/amd/display/dc/dml/soc_bounding_box.c  |     73 +
>   .../gpu/drm/amd/display/dc/dml/soc_bounding_box.h  |     36 +
>   drivers/gpu/drm/amd/display/dc/gpio/Makefile       |     11 +
>   .../amd/display/dc/gpio/dcn10/hw_factory_dcn10.c   |    192 +
>   .../amd/display/dc/gpio/dcn10/hw_factory_dcn10.h   |     32 +
>   .../amd/display/dc/gpio/dcn10/hw_translate_dcn10.c |    408 +
>   .../amd/display/dc/gpio/dcn10/hw_translate_dcn10.h |     34 +
>   drivers/gpu/drm/amd/display/dc/gpio/hw_factory.c   |      9 +-
>   drivers/gpu/drm/amd/display/dc/gpio/hw_translate.c |      9 +
>   drivers/gpu/drm/amd/display/dc/i2caux/Makefile     |     11 +
>   .../drm/amd/display/dc/i2caux/dcn10/i2caux_dcn10.c |    125 +
>   .../drm/amd/display/dc/i2caux/dcn10/i2caux_dcn10.h |     32 +
>   drivers/gpu/drm/amd/display/dc/i2caux/i2caux.c     |      8 +
>   drivers/gpu/drm/amd/display/dc/inc/core_dc.h       |      5 +
>   drivers/gpu/drm/amd/display/dc/inc/core_types.h    |     26 +
>   drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h     |    629 +
>   .../gpu/drm/amd/display/dc/inc/hw/display_clock.h  |      7 +
>   drivers/gpu/drm/amd/display/dc/inc/hw/ipp.h        |      1 +
>   drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h  |     41 +
>   drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h        |    110 +
>   drivers/gpu/drm/amd/display/dc/inc/hw/opp.h        |      1 +
>   .../drm/amd/display/dc/inc/hw/timing_generator.h   |     16 +
>   drivers/gpu/drm/amd/display/dc/irq/Makefile        |     10 +
>   .../amd/display/dc/irq/dcn10/irq_service_dcn10.c   |    361 +
>   .../amd/display/dc/irq/dcn10/irq_service_dcn10.h   |     34 +
>   drivers/gpu/drm/amd/display/dc/irq/irq_service.c   |      5 +
>   drivers/gpu/drm/amd/display/include/dal_asic_id.h  |     13 +
>   drivers/gpu/drm/amd/display/include/dal_types.h    |      5 +-
>   drivers/gpu/drm/amd/include/amd_shared.h           |      4 +-
>   .../include/asic_reg/raven1/DCN/dcn_1_0_default.h  |   7988 ++
>   .../include/asic_reg/raven1/DCN/dcn_1_0_offset.h   |  14087 +++
>   .../include/asic_reg/raven1/DCN/dcn_1_0_sh_mask.h  |  54316 ++++++++
>   .../include/asic_reg/raven1/GC/gc_9_1_default.h    |   4005 +
>   .../amd/include/asic_reg/raven1/GC/gc_9_1_offset.h |   7491 ++
>   .../include/asic_reg/raven1/GC/gc_9_1_sh_mask.h    |  31191 +++++
>   .../asic_reg/raven1/MMHUB/mmhub_9_1_default.h      |   1028 +
>   .../asic_reg/raven1/MMHUB/mmhub_9_1_offset.h       |   1999 +
>   .../asic_reg/raven1/MMHUB/mmhub_9_1_sh_mask.h      |   9790 ++
>   .../include/asic_reg/raven1/MP/mp_10_0_default.h   |    182 +
>   .../include/asic_reg/raven1/MP/mp_10_0_offset.h    |    336 +
>   .../include/asic_reg/raven1/MP/mp_10_0_sh_mask.h   |    886 +
>   .../asic_reg/raven1/NBIO/nbio_7_0_default.h        |  14865 +++
>   .../include/asic_reg/raven1/NBIO/nbio_7_0_offset.h |   4640 +
>   .../asic_reg/raven1/NBIO/nbio_7_0_sh_mask.h        | 118945 ++++++++++++++++++
>   .../asic_reg/raven1/SDMA0/sdma0_4_1_default.h      |    242 +
>   .../asic_reg/raven1/SDMA0/sdma0_4_1_offset.h       |    459 +
>   .../asic_reg/raven1/SDMA0/sdma0_4_1_sh_mask.h      |   1658 +
>   .../include/asic_reg/raven1/THM/thm_10_0_default.h |    141 +
>   .../include/asic_reg/raven1/THM/thm_10_0_offset.h  |    257 +
>   .../include/asic_reg/raven1/THM/thm_10_0_sh_mask.h |    885 +
>   .../include/asic_reg/raven1/VCN/vcn_1_0_default.h  |    202 +
>   .../include/asic_reg/raven1/VCN/vcn_1_0_offset.h   |    376 +
>   .../include/asic_reg/raven1/VCN/vcn_1_0_sh_mask.h  |   1308 +
>   .../gpu/drm/amd/include/ivsrcid/irqsrcs_dcn_1_0.h  |   1134 +
>   drivers/gpu/drm/amd/include/pptable.h              |     57 +-
>   drivers/gpu/drm/amd/powerplay/eventmgr/eventmgr.c  |      4 +-
>   drivers/gpu/drm/amd/powerplay/hwmgr/Makefile       |      2 +-
>   drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c        |      9 +
>   .../gpu/drm/amd/powerplay/hwmgr/processpptables.c  |      4 +
>   drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c     |    974 +
>   drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.h     |    295 +
>   drivers/gpu/drm/amd/powerplay/hwmgr/rv_inc.h       |     43 +
>   drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h  |      3 +-
>   drivers/gpu/drm/amd/powerplay/inc/hwmgr.h          |      7 +-
>   drivers/gpu/drm/amd/powerplay/inc/rv_ppsmc.h       |     76 +
>   drivers/gpu/drm/amd/powerplay/inc/smu10.h          |    188 +
>   .../gpu/drm/amd/powerplay/inc/smu10_driver_if.h    |    116 +
>   drivers/gpu/drm/amd/powerplay/inc/smumgr.h         |      1 +
>   drivers/gpu/drm/amd/powerplay/smumgr/Makefile      |      2 +-
>   drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c   |    399 +
>   drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.h   |     62 +
>   drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c      |      9 +
>   include/uapi/drm/amdgpu_drm.h                      |      5 +-
>   sound/soc/amd/Kconfig                              |      4 +
>   sound/soc/amd/Makefile                             |      1 +
>   sound/soc/amd/raven/Makefile                       |      8 +
>   sound/soc/amd/raven/acp3x-dummy5102.c              |    136 +
>   sound/soc/amd/raven/acp3x-pcm-dma.c                |    805 +
>   sound/soc/amd/raven/acp3x.h                        |     34 +
>   sound/soc/amd/raven/chip_offset_byte.h             |    655 +
>   sound/soc/amd/raven/dummy-w5102.c                  |    102 +
>   sound/soc/amd/raven/pci-acp3x.c                    |    189 +
>   175 files changed, 314946 insertions(+), 121 deletions(-)
>   create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
>   create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
>   create mode 100644 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c
>   create mode 100644 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.h
>   create mode 100644 drivers/gpu/drm/amd/amdgpu/psp_v10_0.c
>   create mode 100644 drivers/gpu/drm/amd/amdgpu/psp_v10_0.h
>   create mode 100644 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
>   create mode 100644 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.h
>   create mode 100644 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c
>   create mode 100644 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.h
>   create mode 100644 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_math.c
>   create mode 100644 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_math.h
>   create mode 100644 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
>   create mode 100644 drivers/gpu/drm/amd/display/dc/dcn10/Makefile
>   create mode 100644 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
>   create mode 100644 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h
>   create mode 100644 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.c
>   create mode 100644 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h
>   create mode 100644 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mem_input.c
>   create mode 100644 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mem_input.h
>   create mode 100644 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c
>   create mode 100644 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.h
>   create mode 100644 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c
>   create mode 100644 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.h
>   create mode 100644 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
>   create mode 100644 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.h
>   create mode 100644 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.c
>   create mode 100644 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.h
>   create mode 100644 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_transform.c
>   create mode 100644 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_transform.h
>   create mode 100644 drivers/gpu/drm/amd/display/dc/dml/Makefile
>   create mode 100644 drivers/gpu/drm/amd/display/dc/dml/dc_features.h
>   create mode 100644 drivers/gpu/drm/amd/display/dc/dml/display_mode_enums.h
>   create mode 100644 drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.c
>   create mode 100644 drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.h
>   create mode 100644 drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h
>   create mode 100644 drivers/gpu/drm/amd/display/dc/dml/display_mode_support.c
>   create mode 100644 drivers/gpu/drm/amd/display/dc/dml/display_mode_support.h
>   create mode 100644 drivers/gpu/drm/amd/display/dc/dml/display_pipe_clocks.c
>   create mode 100644 drivers/gpu/drm/amd/display/dc/dml/display_pipe_clocks.h
>   create mode 100644 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_calc.c
>   create mode 100644 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_calc.h
>   create mode 100644 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c
>   create mode 100644 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.h
>   create mode 100644 drivers/gpu/drm/amd/display/dc/dml/display_watermark.c
>   create mode 100644 drivers/gpu/drm/amd/display/dc/dml/display_watermark.h
>   create mode 100644 drivers/gpu/drm/amd/display/dc/dml/dml_common_defs.c
>   create mode 100644 drivers/gpu/drm/amd/display/dc/dml/dml_common_defs.h
>   create mode 100644 drivers/gpu/drm/amd/display/dc/dml/soc_bounding_box.c
>   create mode 100644 drivers/gpu/drm/amd/display/dc/dml/soc_bounding_box.h
>   create mode 100644 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c
>   create mode 100644 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.h
>   create mode 100644 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c
>   create mode 100644 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.h
>   create mode 100644 drivers/gpu/drm/amd/display/dc/i2caux/dcn10/i2caux_dcn10.c
>   create mode 100644 drivers/gpu/drm/amd/display/dc/i2caux/dcn10/i2caux_dcn10.h
>   create mode 100644 drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h
>   create mode 100644 drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h
>   create mode 100644 drivers/gpu/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c
>   create mode 100644 drivers/gpu/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.h
>   create mode 100644 drivers/gpu/drm/amd/include/asic_reg/raven1/DCN/dcn_1_0_default.h
>   create mode 100644 drivers/gpu/drm/amd/include/asic_reg/raven1/DCN/dcn_1_0_offset.h
>   create mode 100644 drivers/gpu/drm/amd/include/asic_reg/raven1/DCN/dcn_1_0_sh_mask.h
>   create mode 100644 drivers/gpu/drm/amd/include/asic_reg/raven1/GC/gc_9_1_default.h
>   create mode 100644 drivers/gpu/drm/amd/include/asic_reg/raven1/GC/gc_9_1_offset.h
>   create mode 100644 drivers/gpu/drm/amd/include/asic_reg/raven1/GC/gc_9_1_sh_mask.h
>   create mode 100644 drivers/gpu/drm/amd/include/asic_reg/raven1/MMHUB/mmhub_9_1_default.h
>   create mode 100644 drivers/gpu/drm/amd/include/asic_reg/raven1/MMHUB/mmhub_9_1_offset.h
>   create mode 100644 drivers/gpu/drm/amd/include/asic_reg/raven1/MMHUB/mmhub_9_1_sh_mask.h
>   create mode 100644 drivers/gpu/drm/amd/include/asic_reg/raven1/MP/mp_10_0_default.h
>   create mode 100644 drivers/gpu/drm/amd/include/asic_reg/raven1/MP/mp_10_0_offset.h
>   create mode 100644 drivers/gpu/drm/amd/include/asic_reg/raven1/MP/mp_10_0_sh_mask.h
>   create mode 100644 drivers/gpu/drm/amd/include/asic_reg/raven1/NBIO/nbio_7_0_default.h
>   create mode 100644 drivers/gpu/drm/amd/include/asic_reg/raven1/NBIO/nbio_7_0_offset.h
>   create mode 100644 drivers/gpu/drm/amd/include/asic_reg/raven1/NBIO/nbio_7_0_sh_mask.h
>   create mode 100644 drivers/gpu/drm/amd/include/asic_reg/raven1/SDMA0/sdma0_4_1_default.h
>   create mode 100644 drivers/gpu/drm/amd/include/asic_reg/raven1/SDMA0/sdma0_4_1_offset.h
>   create mode 100644 drivers/gpu/drm/amd/include/asic_reg/raven1/SDMA0/sdma0_4_1_sh_mask.h
>   create mode 100644 drivers/gpu/drm/amd/include/asic_reg/raven1/THM/thm_10_0_default.h
>   create mode 100644 drivers/gpu/drm/amd/include/asic_reg/raven1/THM/thm_10_0_offset.h
>   create mode 100644 drivers/gpu/drm/amd/include/asic_reg/raven1/THM/thm_10_0_sh_mask.h
>   create mode 100644 drivers/gpu/drm/amd/include/asic_reg/raven1/VCN/vcn_1_0_default.h
>   create mode 100644 drivers/gpu/drm/amd/include/asic_reg/raven1/VCN/vcn_1_0_offset.h
>   create mode 100644 drivers/gpu/drm/amd/include/asic_reg/raven1/VCN/vcn_1_0_sh_mask.h
>   create mode 100644 drivers/gpu/drm/amd/include/ivsrcid/irqsrcs_dcn_1_0.h
>   create mode 100644 drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c
>   create mode 100644 drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.h
>   create mode 100644 drivers/gpu/drm/amd/powerplay/hwmgr/rv_inc.h
>   create mode 100644 drivers/gpu/drm/amd/powerplay/inc/rv_ppsmc.h
>   create mode 100644 drivers/gpu/drm/amd/powerplay/inc/smu10.h
>   create mode 100644 drivers/gpu/drm/amd/powerplay/inc/smu10_driver_if.h
>   create mode 100644 drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c
>   create mode 100644 drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.h
>   create mode 100644 sound/soc/amd/raven/Makefile
>   create mode 100644 sound/soc/amd/raven/acp3x-dummy5102.c
>   create mode 100644 sound/soc/amd/raven/acp3x-pcm-dma.c
>   create mode 100644 sound/soc/amd/raven/acp3x.h
>   create mode 100644 sound/soc/amd/raven/chip_offset_byte.h
>   create mode 100644 sound/soc/amd/raven/dummy-w5102.c
>   create mode 100644 sound/soc/amd/raven/pci-acp3x.c
>



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