[Public]
Hi all,
This week this patchset was tested on 4 systems, two dGPU and two APU based, and tested across multiple display and connection types.
APU
* Single Display eDP -> 1080p 60hz, 2560x1600 120hz, 1920x1200 165hz
* Single Display DP (SST DSC) -> 4k144hz, 4k240hz
* Multi display -> eDP + DP/HDMI/USB-C -> 1080p 60hz eDP + 4k 144hz, 4k 240hz (Includes USB-C to DP/HDMI adapters)
* Thunderbolt -> LG Ultrafine 5k
* MST DSC -> Cable Matters 101075 (DP to 3x DP) with 3x 4k60hz displays, HP Hook G2 with 2x 4k60hz displays
* USB 4 -> HP Hook G4, Lenovo Thunderbolt Dock, both with 2x 4k60hz DP and 1x 4k60hz HDMI displays
* SST PCON -> Club3D CAC-1085 + 1x 4k 144hz, FRL3, at a max resolution supported by the dongle of 4k 120hz YUV420 12bpc.
* MST PCON -> 1x 4k 144hz, FRL3, at a max resolution supported by the adapter of 4k 120hz RGB 8bpc.
DGPU
* Single Display DP (SST DSC) -> 4k144hz, 4k240hz
* Multiple Display DP -> 4k240hz + 4k144hz
* MST (Startech MST14DP123DP [DP to 3x DP] and 2x 4k 60hz displays)
* MST DSC (with Cable Matters 101075 [DP to 3x DP] with 3x 4k60hz displays)
The testing is a mix of automated and manual tests. Manual testing includes (but is not limited to)
* Changing display configurations and settings
* Video/Audio playback
* Benchmark testing
* Suspend/Resume testing
* Feature testing (Freesync, HDCP, etc.)
Automated testing includes (but is not limited to)
* Script testing (scripts to automate some of the manual checks)
* IGT testing
The testing is mainly tested on the following displays, but occasionally there are tests with other displays
* Samsung G8 Neo 4k240hz
* Samsung QN55QN95B 4k 120hz
* Acer XV322QKKV 4k144hz
* HP U27 4k Wireless 4k60hz
* LG 27UD58B 4k60hz
* LG 32UN650WA 4k60hz
* LG Ultrafine 5k 5k60hz
* AU Optronics B140HAN01.1 1080p 60hz eDP
* AU Optronics B160UAN01.J 1920x1200 165hz eDP
* AU Optronics B160QAN02.L 2560x1600 120hz eDP
The patchset consists of the amd-staging-drm-next branch (Head commit - 06fbedfaf1a93cd81387ecd517dc48f5b89fc465 -> Revert "drm/amd/display: Use HW lock mgr for PSR1") with new patches added on top of it.
Tested on Ubuntu 24.04.1, on Wayland and X11, using KDE Plasma and Gnome.
Tested-by: Daniel Wheeler <daniel.wheeler@xxxxxxx>
Thank you,
Dan Wheeler
Sr. Technologist | AMD
SW Display
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-----Original Message-----
From: Aurabindo Pillai <aurabindo.pillai@xxxxxxx>
Sent: Wednesday, February 5, 2025 1:39 PM
To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Cc: Wentland, Harry <Harry.Wentland@xxxxxxx>; Li, Sun peng (Leo) <Sunpeng.Li@xxxxxxx>; Siqueira, Rodrigo <Rodrigo.Siqueira@xxxxxxx>; Pillai, Aurabindo <Aurabindo.Pillai@xxxxxxx>; Li, Roman <Roman.Li@xxxxxxx>; Lin, Wayne <Wayne.Lin@xxxxxxx>; Chung, ChiaHsuan (Tom) <ChiaHsuan.Chung@xxxxxxx>; Zuo, Jerry <Jerry.Zuo@xxxxxxx>; Mohamed, Zaeem <Zaeem.Mohamed@xxxxxxx>; Chiu, Solomon <Solomon.Chiu@xxxxxxx>; Wheeler, Daniel <Daniel.Wheeler@xxxxxxx>
Subject: [PATCH 00/14] DC Patches for 10 Feb 2025
Summary:
* Start enabling support for 4-plane MPO
* DML21 Updates
* SPL Updates
* Other minor fixes
------------------------------------------------------
Aurabindo Pillai (1):
drm/amd/display: Make dcn401_program_pipe non static
Ausef Yousof (1):
drm/amd/display: limit coverage of optimization skip
Austin Zheng (1):
drm/amd/display: DML21 Reintegration
Brendan Tam (1):
drm/amd/display: add workaround flag to link to force FFE preset
Charlene Liu (1):
drm/amd/display: pass calculated dram_speed_mts to dml2
Ilya Bakoulin (1):
drm/amd/display: Don't try AUX transactions on disconnected link
Leo Zeng (1):
drm/amd/display: add new IRQ enum for underflows
Samson Tam (4):
drm/amd/display: use s1_12 filter tables in SPL
drm/amd/display: remove TF check for LLS policy
drm/amd/display: add s1_12 filter tables
drm/amd/display: sspl: cleanup filter code
Taimur Hassan (1):
drm/amd/display: 3.2.320
Zaeem Mohamed (2):
drm/amd/display: Expose 3 secondary planes for supported ASICs
drm/amd/display: docstring definitions MAX_SURFACES and MAX_PLANES
drivers/gpu/drm/amd/display/dc/dc.h | 10 +-
.../drm/amd/display/dc/dml/dcn35/dcn35_fpu.c | 2 +
.../amd/display/dc/dml/dcn351/dcn351_fpu.c | 1 +
.../display/dc/dml2/dml21/inc/dml_top_types.h | 5 -
.../dml2/dml21/src/dml2_core/dml2_core_dcn4.c | 22 +-
.../dml2/dml21/src/dml2_core/dml2_core_dcn4.h | 3 -
.../src/dml2_core/dml2_core_dcn4_calcs.c | 94 +-
.../dml21/src/dml2_core/dml2_core_shared.c | 12413 ----------------
.../src/dml2_core/dml2_core_shared_types.h | 9 +-
.../dml21/src/dml2_core/dml2_core_utils.c | 3 +-
.../dml2/dml21/src/dml2_dpmm/dml2_dpmm_dcn4.c | 6 +-
.../dml2/dml21/src/dml2_dpmm/dml2_dpmm_dcn4.h | 2 -
.../dml21/src/dml2_mcg/dml2_mcg_factory.c | 2 +-
.../dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c | 5 +-
.../dml21/src/dml2_top/dml2_top_interfaces.c | 1 -
.../dc/dml2/dml21/src/dml2_top/dml_top.c | 354 -
.../dc/dml2/dml21/src/inc/dml2_debug.c | 5 -
.../dc/dml2/dml21/src/inc/dml2_debug.h | 6 +-
.../src/inc/dml2_internal_shared_types.h | 6 -
.../drm/amd/display/dc/dml2/dml2_wrapper.h | 1 +
.../amd/display/dc/hwss/dcn401/dcn401_hwseq.c | 2 +-
.../amd/display/dc/hwss/dcn401/dcn401_hwseq.h | 4 +
drivers/gpu/drm/amd/display/dc/irq_types.h | 1 +
.../display/dc/link/protocols/link_dp_phy.c | 8 +-
.../dc/link/protocols/link_dp_training.c | 2 +
.../dc/resource/dcn21/dcn21_resource.c | 6 +-
.../dc/resource/dcn35/dcn35_resource.c | 7 +-
.../dc/resource/dcn351/dcn351_resource.c | 7 +-
.../dc/resource/dcn401/dcn401_resource.c | 12 +-
drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c | 31 +-
.../display/dc/sspl/dc_spl_isharp_filters.c | 452 +-
.../display/dc/sspl/dc_spl_isharp_filters.h | 18 +-
.../display/dc/sspl/dc_spl_scl_easf_filters.c | 1058 +-
.../display/dc/sspl/dc_spl_scl_easf_filters.h | 9 +-
.../amd/display/dc/sspl/dc_spl_scl_filters.c | 232 +-
.../amd/display/dc/sspl/dc_spl_scl_filters.h | 11 +-
36 files changed, 1231 insertions(+), 13579 deletions(-) delete mode 100644 drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_shared.c
delete mode 100644 drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_top/dml_top.c
--
2.48.1
