[AMD Official Use Only - AMD Internal Distribution Only] Ping (plus Jay) Kent > -----Original Message----- > From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Elena > Sakhnovitch > Sent: Tuesday, January 14, 2025 2:53 PM > To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx > Cc: Sakhnovitch, Elena (Elen) <Elena.Sakhnovitch@xxxxxxx>; Kasiviswanathan, > Harish <Harish.Kasiviswanathan@xxxxxxx>; Sakhnovitch, Elena (Elen) > <Elena.Sakhnovitch@xxxxxxx> > Subject: [PATCH 3/3] drm/amdgpu: Set lower queue retry timeout for gfx9 family > > From: Harish Kasiviswanathan <Harish.Kasiviswanathan@xxxxxxx> > > Set more optimized queue retry timeout for gfx9 family starting with > arcturus. > > Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@xxxxxxx> > Signed-off-by: Elena Sakhnovitch <Elena.Sakhnovitch@xxxxxxx> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c | 1 + > drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.h | 1 + > drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c | 8 ++++++++ > drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.h | 1 + > drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_v9.c | 14 +++++++++++++- > drivers/gpu/drm/amd/include/kgd_kfd_interface.h | 1 + > 6 files changed, 25 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c > b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c > index 8e72dcff8867..652c695d04e2 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c > @@ -1024,6 +1024,7 @@ void kgd_gfx_v10_get_iq_wait_times(struct > amdgpu_device *adev, > void kgd_gfx_v10_build_grace_period_packet_info(struct amdgpu_device *adev, > uint32_t wait_times, > uint32_t grace_period, > + uint32_t que_sleep, > uint32_t *reg_offset, > uint32_t *reg_data) > { > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.h > b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.h > index 9efd2dd4fdd7..11aedaa8a0b9 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.h > @@ -54,6 +54,7 @@ void kgd_gfx_v10_get_iq_wait_times(struct amdgpu_device > *adev, > void kgd_gfx_v10_build_grace_period_packet_info(struct amdgpu_device *adev, > uint32_t wait_times, > uint32_t grace_period, > + uint32_t que_sleep, > uint32_t *reg_offset, > uint32_t *reg_data); > uint64_t kgd_gfx_v10_hqd_get_pq_addr(struct amdgpu_device *adev, > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c > b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c > index 04c86a229a23..d93a0285f225 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c > @@ -1080,6 +1080,7 @@ void kgd_gfx_v9_get_cu_occupancy(struct > amdgpu_device *adev, > void kgd_gfx_v9_build_grace_period_packet_info(struct amdgpu_device *adev, > uint32_t wait_times, > uint32_t grace_period, > + uint32_t que_sleep, > uint32_t *reg_offset, > uint32_t *reg_data) > { > @@ -1092,6 +1093,13 @@ void kgd_gfx_v9_build_grace_period_packet_info(struct > amdgpu_device *adev, > grace_period); > } > > + if (que_sleep) { > + *reg_data = REG_SET_FIELD(*reg_data, > + CP_IQ_WAIT_TIME2, > + QUE_SLEEP, > + que_sleep); > + } > + > *reg_offset = SOC15_REG_OFFSET(GC, 0, mmCP_IQ_WAIT_TIME2); > } > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.h > b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.h > index b6a91a552aa4..3f159d477f5b 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.h > @@ -100,6 +100,7 @@ void kgd_gfx_v9_get_iq_wait_times(struct amdgpu_device > *adev, > void kgd_gfx_v9_build_grace_period_packet_info(struct amdgpu_device *adev, > uint32_t wait_times, > uint32_t grace_period, > + uint32_t que_sleep, > uint32_t *reg_offset, > uint32_t *reg_data); > uint64_t kgd_gfx_v9_hqd_get_pq_addr(struct amdgpu_device *adev, > diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_v9.c > b/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_v9.c > index adc7f7c78a18..4de8106d14ba 100644 > --- a/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_v9.c > +++ b/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_v9.c > @@ -305,6 +305,7 @@ static int pm_set_grace_period_v9(struct packet_manager > *pm, > struct device_queue_manager *dqm = pm->dqm; > uint32_t reg_offset = 0; > uint32_t reg_data = 0; > + uint32_t que_sleep = 0; > > /* > * The CP cannot handle a 0 grace period input and will result in > @@ -319,18 +320,29 @@ static int pm_set_grace_period_v9(struct > packet_manager *pm, > } > > if (grace_period == SET_ASIC_OPTIMIZED_GRACE_PERIOD) { > + /* Reduce CP_IQ_WAIT_TIME2.QUE_SLEEP to 0x1 from default > 0x40. > + * On a 1GHz machine this is roughly 1 microsecond, which is > + * about how long it takes to load data out of memory during > + * queue connect > + * QUE_SLEEP: Wait Count for Dequeue Retry. > + */ > + if (KFD_GC_VERSION(dqm->dev) >= IP_VERSION(9, 4, 1) && > + KFD_GC_VERSION(dqm->dev) < IP_VERSION(10, 0, 0)) > + que_sleep = 1; > + > /* Set CWSR grace period to 1x1000 cycle for GFX9.4.3 APU */ > if (amdgpu_emu_mode == 0 && dqm->dev->adev->gmc.is_app_apu > && > KFD_GC_VERSION(dqm->dev) == IP_VERSION(9, 4, 3)) > grace_period = 1; > else > - return 0; > + grace_period = 0; /* 0 will keep the default value */ > } > > pm->dqm->dev->kfd2kgd->build_grace_period_packet_info( > pm->dqm->dev->adev, > pm->dqm->wait_times, > grace_period, > + que_sleep, > ®_offset, > ®_data); > > diff --git a/drivers/gpu/drm/amd/include/kgd_kfd_interface.h > b/drivers/gpu/drm/amd/include/kgd_kfd_interface.h > index e3e635a31b8a..1ed3fbedf50b 100644 > --- a/drivers/gpu/drm/amd/include/kgd_kfd_interface.h > +++ b/drivers/gpu/drm/amd/include/kgd_kfd_interface.h > @@ -316,6 +316,7 @@ struct kfd2kgd_calls { > void (*build_grace_period_packet_info)(struct amdgpu_device *adev, > uint32_t wait_times, > uint32_t grace_period, > + uint32_t que_sleep, > uint32_t *reg_offset, > uint32_t *reg_data); > void (*get_cu_occupancy)(struct amdgpu_device *adev, > -- > 2.34.1