Re: [PATCH] drm/amdgpu: Set snoop bit for SDMA for MI series

[Philip Yang <yangp@xxxxxxx>]

On 2025-02-05 22:07, Kasiviswanathan, Harish wrote:

[Public]

 

 

From: Yang, Philip <Philip.Yang@xxxxxxx>
Sent: Wednesday, February 5, 2025 6:09 PM
To: Kasiviswanathan, Harish <Harish.Kasiviswanathan@xxxxxxx>; amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Subject: Re: [PATCH] drm/amdgpu: Set snoop bit for SDMA for MI series

 

 

On 2025-02-04 18:02, Harish Kasiviswanathan wrote:

SDMA writes has to probe invalidate RW lines. Set snoop bit in mmhub for

this to happen.

Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@xxxxxxx>

---

 drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c       | 25 ++++++++++

 drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c       | 27 +++++++++++

 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c       | 30 ++++++++++++

 .../asic_reg/mmhub/mmhub_9_4_1_offset.h       | 32 +++++++++++++

 .../asic_reg/mmhub/mmhub_9_4_1_sh_mask.h      | 48 +++++++++++++++++++

 5 files changed, 162 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

index 9689e2b5d4e5..55659a4cbd10 100644

--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

@@ -172,6 +172,30 @@ static void mmhub_v1_7_init_tlb_regs(struct amdgpu_device *adev)

  WREG32_SOC15(MMHUB, 0, regMC_VM_MX_L1_TLB_CNTL, tmp);

 }

+/* Set snoop bit for SDMA so that SDMA writes probe-invalidates RW lines */

+static void mmhub_v1_7_set_snoop(struct amdgpu_device *adev)

+{

+ uint32_t tmp;

+ int j;

+ uint32_t distance = regDAGB1_WRCLI_GPU_SNOOP_OVERRIDE -

+                    regDAGB0_WRCLI_GPU_SNOOP_OVERRIDE;

+

+ for (j = 0; j < 5; j++) { /* DAGB instances */

+        tmp = RREG32_SOC15_OFFSET(MMHUB, 0,

+                regDAGB0_WRCLI_GPU_SNOOP_OVERRIDE, j*distance);

+        tmp |= (1 << 15); /* SDMA client is BIT15 */

+        WREG32_SOC15_OFFSET(MMHUB, 0,

+                regDAGB0_WRCLI_GPU_SNOOP_OVERRIDE, j*distance, tmp);

+

+        tmp = RREG32_SOC15_OFFSET(MMHUB, 0,

+                regDAGB0_WRCLI_GPU_SNOOP_OVERRIDE_VALUE, j*distance);

+        tmp |= (1 << 15);

+        WREG32_SOC15_OFFSET(MMHUB, 0,

+                regDAGB0_WRCLI_GPU_SNOOP_OVERRIDE_VALUE, j*distance, tmp);

+ }

+

+}

+

 static void mmhub_v1_7_init_cache_regs(struct amdgpu_device *adev)

 {

  uint32_t tmp;

@@ -337,6 +361,7 @@ static int mmhub_v1_7_gart_enable(struct amdgpu_device *adev)

  mmhub_v1_7_init_system_aperture_regs(adev);

  mmhub_v1_7_init_tlb_regs(adev);

  mmhub_v1_7_init_cache_regs(adev);

+ mmhub_v1_7_set_snoop(adev);

  mmhub_v1_7_enable_system_domain(adev);

  mmhub_v1_7_disable_identity_aperture(adev);

diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

index e646e5cef0a2..92afffd27415 100644

--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

@@ -213,6 +213,32 @@ static void mmhub_v1_8_init_tlb_regs(struct amdgpu_device *adev)

  }

 }

+/* Set snoop bit for SDMA so that SDMA writes probe-invalidates RW lines */

+static void mmhub_v1_8_set_snoop(struct amdgpu_device *adev)

+{

+ uint32_t tmp, inst_mask;

+ int i, j;

+ uint32_t distance = regDAGB1_WRCLI_GPU_SNOOP_OVERRIDE -

+                    regDAGB0_WRCLI_GPU_SNOOP_OVERRIDE;

+

+ inst_mask = adev->aid_mask;

+ for_each_inst(i, inst_mask) {

+        for (j = 0; j < 5; j++) { /* DAGB instances */

+                tmp = RREG32_SOC15_OFFSET(MMHUB, i,

+                  regDAGB0_WRCLI_GPU_SNOOP_OVERRIDE, j*distance);

+                tmp |= (1 << 15); /* SDMA client is BIT15 */

+                WREG32_SOC15_OFFSET(MMHUB, i,

+                  regDAGB0_WRCLI_GPU_SNOOP_OVERRIDE, j*distance, tmp);

+

+                tmp = RREG32_SOC15_OFFSET(MMHUB, i,

+                  regDAGB0_WRCLI_GPU_SNOOP_OVERRIDE_VALUE, j*distance);

+                tmp |= (1 << 15);

+                WREG32_SOC15_OFFSET(MMHUB, i,

+                  regDAGB0_WRCLI_GPU_SNOOP_OVERRIDE_VALUE, j*distance, tmp);

+        }

+ }

+}

+

 static void mmhub_v1_8_init_cache_regs(struct amdgpu_device *adev)

 {

  uint32_t tmp, inst_mask;

@@ -418,6 +444,7 @@ static int mmhub_v1_8_gart_enable(struct amdgpu_device *adev)

  mmhub_v1_8_init_system_aperture_regs(adev);

  mmhub_v1_8_init_tlb_regs(adev);

  mmhub_v1_8_init_cache_regs(adev);

+ mmhub_v1_8_set_snoop(adev);

Why only change mmhub_v1_7/8, not other mmhub_v2/3/4 versions? Maybe the setting is not needed for old ASICS,  only set this in mmhub_v9_4.
[HK]: Currently, this change is critical for MI GFX9 series, so this patch is focused on that. For other ASICs a separate patch will be send later.

yes, I think this works as we don't see issue on other ASICs.

One more nitpick, maybe change the function name mmhub_v1_8_set_snoop to mmhub_v1_8_init_snoop_override_regs, to use the same function name pattern in this file.

Regards,

Philip

  mmhub_v1_8_enable_system_domain(adev);

  mmhub_v1_8_disable_identity_aperture(adev);

diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c

index ff1b58e44689..557119cd1ecc 100644

--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c

+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c

@@ -198,6 +198,35 @@ static void mmhub_v9_4_init_tlb_regs(struct amdgpu_device *adev, int hubid)

                     hubid * MMHUB_INSTANCE_REGISTER_OFFSET, tmp);

 }

+/* Set snoop bit for SDMA so that SDMA writes probe-invalidates RW lines */

+static void mmhub_v9_4_set_snoop(struct amdgpu_device *adev, int hubid)

+{

+ uint32_t tmp;

+ int j;

loop index uses variable i

[HK]: Yes, will change.

+ uint32_t distance = mmDAGB1_WRCLI_GPU_SNOOP_OVERRIDE -

+                    mmDAGB0_WRCLI_GPU_SNOOP_OVERRIDE;

+

+ for (j = 0; j < 4 - (2 * hubid); j++) {

+        /* DAGB instances 0 to 4 are in hub0 and 5 to 7 are in hub1 */

maybe define variable offset = hubid * MMHUB_INSTANCE_REGISTER_OFFSET + j * distance
[HK]: Yes. I can change to offset = hubid * MMHUB_INSTANCE_REGISTER_OFFSET but (j * distance) would be inside the loop.

 

then use offset variable to remove the duplicate calculation.

Regards,

Philip

+        tmp = RREG32_SOC15_OFFSET(MMHUB, 0,

+                mmDAGB0_WRCLI_GPU_SNOOP_OVERRIDE,

+                hubid * MMHUB_INSTANCE_REGISTER_OFFSET + j * distance);

+        tmp |= (1 << 15); /* SDMA client is BIT15 */

+        WREG32_SOC15_OFFSET(MMHUB, 0,

+                mmDAGB0_WRCLI_GPU_SNOOP_OVERRIDE,

+                hubid * MMHUB_INSTANCE_REGISTER_OFFSET + j * distance, tmp);

+

+        tmp = RREG32_SOC15_OFFSET(MMHUB, 0,

+                mmDAGB0_WRCLI_GPU_SNOOP_OVERRIDE_VALUE,

+                hubid * MMHUB_INSTANCE_REGISTER_OFFSET + j * distance);

+        tmp |= (1 << 15);

+        WREG32_SOC15_OFFSET(MMHUB, 0,

+                mmDAGB0_WRCLI_GPU_SNOOP_OVERRIDE_VALUE,

+                hubid * MMHUB_INSTANCE_REGISTER_OFFSET + j * distance, tmp);

+ }

+

+}

+

 static void mmhub_v9_4_init_cache_regs(struct amdgpu_device *adev, int hubid)

 {

  uint32_t tmp;

@@ -392,6 +421,7 @@ static int mmhub_v9_4_gart_enable(struct amdgpu_device *adev)

         if (!amdgpu_sriov_vf(adev))

                 mmhub_v9_4_init_cache_regs(adev, i);

+        mmhub_v9_4_set_snoop(adev, i);

         mmhub_v9_4_enable_system_domain(adev, i);

         if (!amdgpu_sriov_vf(adev))

           mmhub_v9_4_disable_identity_aperture(adev, i);

diff --git a/drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_4_1_offset.h b/drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_4_1_offset.h

index c488d4a50cf4..b2252deabc17 100644

--- a/drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_4_1_offset.h

+++ b/drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_4_1_offset.h

@@ -203,6 +203,10 @@

 #define mmDAGB0_WR_DATA_CREDIT_BASE_IDX                                                                1

 #define mmDAGB0_WR_MISC_CREDIT                                                                         0x0058

 #define mmDAGB0_WR_MISC_CREDIT_BASE_IDX                                                                1

+#define mmDAGB0_WRCLI_GPU_SNOOP_OVERRIDE                                                               0x005b

+#define mmDAGB0_WRCLI_GPU_SNOOP_OVERRIDE_BASE_IDX                                                      1

+#define mmDAGB0_WRCLI_GPU_SNOOP_OVERRIDE_VALUE                                                         0x005c

+#define mmDAGB0_WRCLI_GPU_SNOOP_OVERRIDE_VALUE_BASE_IDX                                                1

 #define mmDAGB0_WRCLI_ASK_PENDING                                                                      0x005d

 #define mmDAGB0_WRCLI_ASK_PENDING_BASE_IDX                                                             1

 #define mmDAGB0_WRCLI_GO_PENDING                                                                       0x005e

@@ -455,6 +459,10 @@

 #define mmDAGB1_WR_DATA_CREDIT_BASE_IDX                                                                1

 #define mmDAGB1_WR_MISC_CREDIT                                                                         0x00d8

 #define mmDAGB1_WR_MISC_CREDIT_BASE_IDX                                                                1

+#define mmDAGB1_WRCLI_GPU_SNOOP_OVERRIDE                                                               0x00db

+#define mmDAGB1_WRCLI_GPU_SNOOP_OVERRIDE_BASE_IDX                                                      1

+#define mmDAGB1_WRCLI_GPU_SNOOP_OVERRIDE_VALUE                                                         0x00dc

+#define mmDAGB1_WRCLI_GPU_SNOOP_OVERRIDE_VALUE_BASE_IDX                                                1

 #define mmDAGB1_WRCLI_ASK_PENDING                                                                      0x00dd

 #define mmDAGB1_WRCLI_ASK_PENDING_BASE_IDX                                                             1

 #define mmDAGB1_WRCLI_GO_PENDING                                                                       0x00de

@@ -707,6 +715,10 @@

 #define mmDAGB2_WR_DATA_CREDIT_BASE_IDX                                                                1

 #define mmDAGB2_WR_MISC_CREDIT                                                                         0x0158

 #define mmDAGB2_WR_MISC_CREDIT_BASE_IDX                                                                1

+#define mmDAGB2_WRCLI_GPU_SNOOP_OVERRIDE                                                               0x015b

+#define mmDAGB2_WRCLI_GPU_SNOOP_OVERRIDE_BASE_IDX                                                      1

+#define mmDAGB2_WRCLI_GPU_SNOOP_OVERRIDE_VALUE                                                         0x015c

+#define mmDAGB2_WRCLI_GPU_SNOOP_OVERRIDE_VALUE_BASE_IDX                                                1

 #define mmDAGB2_WRCLI_ASK_PENDING                                                                      0x015d

 #define mmDAGB2_WRCLI_ASK_PENDING_BASE_IDX                                                             1

 #define mmDAGB2_WRCLI_GO_PENDING                                                                       0x015e

@@ -959,6 +971,10 @@

 #define mmDAGB3_WR_DATA_CREDIT_BASE_IDX                                                                1

 #define mmDAGB3_WR_MISC_CREDIT                                                                         0x01d8

 #define mmDAGB3_WR_MISC_CREDIT_BASE_IDX                                                                1

+#define mmDAGB3_WRCLI_GPU_SNOOP_OVERRIDE                                                               0x01db

+#define mmDAGB3_WRCLI_GPU_SNOOP_OVERRIDE_BASE_IDX                                                      1

+#define mmDAGB3_WRCLI_GPU_SNOOP_OVERRIDE_VALUE                                                         0x01dc

+#define mmDAGB3_WRCLI_GPU_SNOOP_OVERRIDE_VALUE_BASE_IDX                                                1

 #define mmDAGB3_WRCLI_ASK_PENDING                                                                      0x01dd

 #define mmDAGB3_WRCLI_ASK_PENDING_BASE_IDX                                                             1

 #define mmDAGB3_WRCLI_GO_PENDING                                                                       0x01de

@@ -1211,6 +1227,10 @@

 #define mmDAGB4_WR_DATA_CREDIT_BASE_IDX                                                                1

 #define mmDAGB4_WR_MISC_CREDIT                                                                         0x0258

 #define mmDAGB4_WR_MISC_CREDIT_BASE_IDX                                                                1

+#define mmDAGB4_WRCLI_GPU_SNOOP_OVERRIDE                                                               0x025b

+#define mmDAGB4_WRCLI_GPU_SNOOP_OVERRIDE_BASE_IDX                                                      1

+#define mmDAGB4_WRCLI_GPU_SNOOP_OVERRIDE_VALUE                                                         0x025c

+#define mmDAGB4_WRCLI_GPU_SNOOP_OVERRIDE_VALUE_BASE_IDX                                                1

 #define mmDAGB4_WRCLI_ASK_PENDING                                                                      0x025d

 #define mmDAGB4_WRCLI_ASK_PENDING_BASE_IDX                                                             1

 #define mmDAGB4_WRCLI_GO_PENDING                                                                       0x025e

@@ -4793,6 +4813,10 @@

 #define mmDAGB5_WR_DATA_CREDIT_BASE_IDX                                                                1

 #define mmDAGB5_WR_MISC_CREDIT                                                                         0x3058

 #define mmDAGB5_WR_MISC_CREDIT_BASE_IDX                                                                1

+#define mmDAGB5_WRCLI_GPU_SNOOP_OVERRIDE                                                               0x305b

+#define mmDAGB5_WRCLI_GPU_SNOOP_OVERRIDE_BASE_IDX                                                      1

+#define mmDAGB5_WRCLI_GPU_SNOOP_OVERRIDE_VALUE                                                         0x305c

+#define mmDAGB5_WRCLI_GPU_SNOOP_OVERRIDE_VALUE_BASE_IDX                                                1

 #define mmDAGB5_WRCLI_ASK_PENDING                                                                      0x305d

 #define mmDAGB5_WRCLI_ASK_PENDING_BASE_IDX                                                             1

 #define mmDAGB5_WRCLI_GO_PENDING                                                                       0x305e

@@ -5045,6 +5069,10 @@

 #define mmDAGB6_WR_DATA_CREDIT_BASE_IDX                                                                1

 #define mmDAGB6_WR_MISC_CREDIT                                                                         0x30d8

 #define mmDAGB6_WR_MISC_CREDIT_BASE_IDX                                                                1

+#define mmDAGB6_WRCLI_GPU_SNOOP_OVERRIDE                                                               0x30db

+#define mmDAGB6_WRCLI_GPU_SNOOP_OVERRIDE_BASE_IDX                                                      1

+#define mmDAGB6_WRCLI_GPU_SNOOP_OVERRIDE_VALUE                                                         0x30dc

+#define mmDAGB6_WRCLI_GPU_SNOOP_OVERRIDE_VALUE_BASE_IDX                                                1

 #define mmDAGB6_WRCLI_ASK_PENDING                                                                      0x30dd

 #define mmDAGB6_WRCLI_ASK_PENDING_BASE_IDX                                                             1

 #define mmDAGB6_WRCLI_GO_PENDING                                                                       0x30de

@@ -5297,6 +5325,10 @@

 #define mmDAGB7_WR_DATA_CREDIT_BASE_IDX                                                                1

 #define mmDAGB7_WR_MISC_CREDIT                                                                         0x3158

 #define mmDAGB7_WR_MISC_CREDIT_BASE_IDX                                                                1

+#define mmDAGB7_WRCLI_GPU_SNOOP_OVERRIDE                                                               0x315b

+#define mmDAGB7_WRCLI_GPU_SNOOP_OVERRIDE_BASE_IDX                                                      1

+#define mmDAGB7_WRCLI_GPU_SNOOP_OVERRIDE_VALUE                                                         0x315c

+#define mmDAGB7_WRCLI_GPU_SNOOP_OVERRIDE_VALUE_BASE_IDX                                                1

 #define mmDAGB7_WRCLI_ASK_PENDING                                                                      0x315d

 #define mmDAGB7_WRCLI_ASK_PENDING_BASE_IDX                                                             1

 #define mmDAGB7_WRCLI_GO_PENDING                                                                       0x315e

diff --git a/drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_4_1_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_4_1_sh_mask.h

index 2969fbf282b7..5069d2fd467f 100644

--- a/drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_4_1_sh_mask.h

+++ b/drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_4_1_sh_mask.h

@@ -1532,6 +1532,12 @@

 //DAGB0_WRCLI_DBUS_GO_PENDING

 #define DAGB0_WRCLI_DBUS_GO_PENDING__BUSY__SHIFT                                                              0x0

 #define DAGB0_WRCLI_DBUS_GO_PENDING__BUSY_MASK                                                                0xFFFFFFFFL

+//DAGB0_WRCLI_GPU_SNOOP_OVERRIDE

+#define DAGB0_WRCLI_GPU_SNOOP_OVERRIDE__ENABLE__SHIFT                                                         0x0

+#define DAGB0_WRCLI_GPU_SNOOP_OVERRIDE__ENABLE_MASK                                                           0xFFFFFFFFL

+//DAGB0_WRCLI_GPU_SNOOP_OVERRIDE_VALUE

+#define DAGB0_WRCLI_GPU_SNOOP_OVERRIDE_VALUE__ENABLE__SHIFT                                                   0x0

+#define DAGB0_WRCLI_GPU_SNOOP_OVERRIDE_VALUE__ENABLE_MASK                                                     0xFFFFFFFFL

 //DAGB0_DAGB_DLY

 #define DAGB0_DAGB_DLY__DLY__SHIFT                                                                            0x0

 #define DAGB0_DAGB_DLY__CLI__SHIFT                                                                            0x8

@@ -3207,6 +3213,12 @@

 //DAGB1_WRCLI_DBUS_GO_PENDING

 #define DAGB1_WRCLI_DBUS_GO_PENDING__BUSY__SHIFT                                                              0x0

 #define DAGB1_WRCLI_DBUS_GO_PENDING__BUSY_MASK                                                                0xFFFFFFFFL

+//DAGB1_WRCLI_GPU_SNOOP_OVERRIDE

+#define DAGB1_WRCLI_GPU_SNOOP_OVERRIDE__ENABLE__SHIFT                                                         0x0

+#define DAGB1_WRCLI_GPU_SNOOP_OVERRIDE__ENABLE_MASK                                                           0xFFFFFFFFL

+//DAGB1_WRCLI_GPU_SNOOP_OVERRIDE_VALUE

+#define DAGB1_WRCLI_GPU_SNOOP_OVERRIDE_VALUE__ENABLE__SHIFT                                                   0x0

+#define DAGB1_WRCLI_GPU_SNOOP_OVERRIDE_VALUE__ENABLE_MASK                                                     0xFFFFFFFFL

 //DAGB1_DAGB_DLY

 #define DAGB1_DAGB_DLY__DLY__SHIFT                                                                            0x0

 #define DAGB1_DAGB_DLY__CLI__SHIFT                                                                            0x8

@@ -4882,6 +4894,12 @@

 //DAGB2_WRCLI_DBUS_GO_PENDING

 #define DAGB2_WRCLI_DBUS_GO_PENDING__BUSY__SHIFT                                                              0x0

 #define DAGB2_WRCLI_DBUS_GO_PENDING__BUSY_MASK                                                                0xFFFFFFFFL

+//DAGB2_WRCLI_GPU_SNOOP_OVERRIDE

+#define DAGB2_WRCLI_GPU_SNOOP_OVERRIDE__ENABLE__SHIFT                                                         0x0

+#define DAGB2_WRCLI_GPU_SNOOP_OVERRIDE__ENABLE_MASK                                                           0xFFFFFFFFL

+//DAGB2_WRCLI_GPU_SNOOP_OVERRIDE_VALUE

+#define DAGB2_WRCLI_GPU_SNOOP_OVERRIDE_VALUE__ENABLE__SHIFT                                                   0x0

+#define DAGB2_WRCLI_GPU_SNOOP_OVERRIDE_VALUE__ENABLE_MASK                                                     0xFFFFFFFFL

 //DAGB2_DAGB_DLY

 #define DAGB2_DAGB_DLY__DLY__SHIFT                                                                            0x0

 #define DAGB2_DAGB_DLY__CLI__SHIFT                                                                            0x8

@@ -6557,6 +6575,12 @@

 //DAGB3_WRCLI_DBUS_GO_PENDING

 #define DAGB3_WRCLI_DBUS_GO_PENDING__BUSY__SHIFT                                                              0x0

 #define DAGB3_WRCLI_DBUS_GO_PENDING__BUSY_MASK                                                                0xFFFFFFFFL

+//DAGB3_WRCLI_GPU_SNOOP_OVERRIDE

+#define DAGB3_WRCLI_GPU_SNOOP_OVERRIDE__ENABLE__SHIFT                                                         0x0

+#define DAGB3_WRCLI_GPU_SNOOP_OVERRIDE__ENABLE_MASK                                                           0xFFFFFFFFL

+//DAGB3_WRCLI_GPU_SNOOP_OVERRIDE_VALUE

+#define DAGB3_WRCLI_GPU_SNOOP_OVERRIDE_VALUE__ENABLE__SHIFT                                                   0x0

+#define DAGB3_WRCLI_GPU_SNOOP_OVERRIDE_VALUE__ENABLE_MASK                                                     0xFFFFFFFFL

 //DAGB3_DAGB_DLY

 #define DAGB3_DAGB_DLY__DLY__SHIFT                                                                            0x0

 #define DAGB3_DAGB_DLY__CLI__SHIFT                                                                            0x8

@@ -8232,6 +8256,12 @@

 //DAGB4_WRCLI_DBUS_GO_PENDING

 #define DAGB4_WRCLI_DBUS_GO_PENDING__BUSY__SHIFT                                                              0x0

 #define DAGB4_WRCLI_DBUS_GO_PENDING__BUSY_MASK                                                                0xFFFFFFFFL

+//DAGB4_WRCLI_GPU_SNOOP_OVERRIDE

+#define DAGB4_WRCLI_GPU_SNOOP_OVERRIDE__ENABLE__SHIFT                                                         0x0

+#define DAGB4_WRCLI_GPU_SNOOP_OVERRIDE__ENABLE_MASK                                                           0xFFFFFFFFL

+//DAGB4_WRCLI_GPU_SNOOP_OVERRIDE_VALUE

+#define DAGB4_WRCLI_GPU_SNOOP_OVERRIDE_VALUE__ENABLE__SHIFT                                                   0x0

+#define DAGB4_WRCLI_GPU_SNOOP_OVERRIDE_VALUE__ENABLE_MASK                                                     0xFFFFFFFFL

 //DAGB4_DAGB_DLY

 #define DAGB4_DAGB_DLY__DLY__SHIFT                                                                            0x0

 #define DAGB4_DAGB_DLY__CLI__SHIFT                                                                            0x8

@@ -28737,6 +28767,12 @@

 //DAGB5_WRCLI_DBUS_GO_PENDING

 #define DAGB5_WRCLI_DBUS_GO_PENDING__BUSY__SHIFT                                                              0x0

 #define DAGB5_WRCLI_DBUS_GO_PENDING__BUSY_MASK                                                                0xFFFFFFFFL

+//DAGB5_WRCLI_GPU_SNOOP_OVERRIDE

+#define DAGB5_WRCLI_GPU_SNOOP_OVERRIDE__ENABLE__SHIFT                                                         0x0

+#define DAGB5_WRCLI_GPU_SNOOP_OVERRIDE__ENABLE_MASK                                                           0xFFFFFFFFL

+//DAGB5_WRCLI_GPU_SNOOP_OVERRIDE_VALUE

+#define DAGB5_WRCLI_GPU_SNOOP_OVERRIDE_VALUE__ENABLE__SHIFT                                                   0x0

+#define DAGB5_WRCLI_GPU_SNOOP_OVERRIDE_VALUE__ENABLE_MASK                                                     0xFFFFFFFFL

 //DAGB5_DAGB_DLY

 #define DAGB5_DAGB_DLY__DLY__SHIFT                                                                            0x0

 #define DAGB5_DAGB_DLY__CLI__SHIFT                                                                            0x8

@@ -30412,6 +30448,12 @@

 //DAGB6_WRCLI_DBUS_GO_PENDING

 #define DAGB6_WRCLI_DBUS_GO_PENDING__BUSY__SHIFT                                                              0x0

 #define DAGB6_WRCLI_DBUS_GO_PENDING__BUSY_MASK                                                                0xFFFFFFFFL

+//DAGB6_WRCLI_GPU_SNOOP_OVERRIDE

+#define DAGB6_WRCLI_GPU_SNOOP_OVERRIDE__ENABLE__SHIFT                                                         0x0

+#define DAGB6_WRCLI_GPU_SNOOP_OVERRIDE__ENABLE_MASK                                                           0xFFFFFFFFL

+//DAGB6_WRCLI_GPU_SNOOP_OVERRIDE_VALUE

+#define DAGB6_WRCLI_GPU_SNOOP_OVERRIDE_VALUE__ENABLE__SHIFT                                                   0x0

+#define DAGB6_WRCLI_GPU_SNOOP_OVERRIDE_VALUE__ENABLE_MASK                                                     0xFFFFFFFFL

 //DAGB6_DAGB_DLY

 #define DAGB6_DAGB_DLY__DLY__SHIFT                                                                            0x0

 #define DAGB6_DAGB_DLY__CLI__SHIFT                                                                            0x8

@@ -32087,6 +32129,12 @@

 //DAGB7_WRCLI_DBUS_GO_PENDING

 #define DAGB7_WRCLI_DBUS_GO_PENDING__BUSY__SHIFT                                                              0x0

 #define DAGB7_WRCLI_DBUS_GO_PENDING__BUSY_MASK                                                                0xFFFFFFFFL

+//DAGB7_WRCLI_GPU_SNOOP_OVERRIDE

+#define DAGB7_WRCLI_GPU_SNOOP_OVERRIDE__ENABLE__SHIFT                                                         0x0

+#define DAGB7_WRCLI_GPU_SNOOP_OVERRIDE__ENABLE_MASK                                                           0xFFFFFFFFL

+//DAGB7_WRCLI_GPU_SNOOP_OVERRIDE_VALUE

+#define DAGB7_WRCLI_GPU_SNOOP_OVERRIDE_VALUE__ENABLE__SHIFT                                                   0x0

+#define DAGB7_WRCLI_GPU_SNOOP_OVERRIDE_VALUE__ENABLE_MASK                                                     0xFFFFFFFFL

 //DAGB7_DAGB_DLY

 #define DAGB7_DAGB_DLY__DLY__SHIFT                                                                            0x0

 #define DAGB7_DAGB_DLY__CLI__SHIFT                                                                            0x8