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[AMD Official Use Only - AMD Internal Distribution Only]
Hi Lijo,
This will not affect 1VF mode. I just matched SMU supported/unsupported VF msg .
Messages for 1 VF mode are still enabled, such as handle smu features, handle soft frequences, etc.
Thanks.
Best regard, Yifan Zha
From: Lazar, Lijo <Lijo.Lazar@xxxxxxx>
Sent: Tuesday, January 21, 2025 5:48 PM To: Zha, YiFan(Even) <Yifan.Zha@xxxxxxx>; amd-gfx@xxxxxxxxxxxxxxxxxxxxx <amd-gfx@xxxxxxxxxxxxxxxxxxxxx>; Deucher, Alexander <Alexander.Deucher@xxxxxxx>; Zhang, Hawking <Hawking.Zhang@xxxxxxx> Cc: Chen, Horace <Horace.Chen@xxxxxxx>; Chang, HaiJun <HaiJun.Chang@xxxxxxx> Subject: Re: [PATCH] drm/amd/pm: Update smu_v13_0_0 SRIOV VF flag in msg mapping table On 1/20/2025 9:19 AM, Yifan Zha wrote: > [Why] > Under SRIOV VF, driver send a VF unsupportted smu message causing > a failure. > > [How] > Update smu_v13_0_0 message mapping table based on PMFW. > Does this hold good for 1VF case also? Thanks, Lijo > Signed-off-by: Yifan Zha <Yifan.Zha@xxxxxxx> > --- > drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c > index 0551a3311217..985355bf78b2 100644 > --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c > +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c > @@ -126,7 +126,7 @@ static struct cmn2asic_msg_mapping smu_v13_0_0_message_map[SMU_MSG_MAX_COUNT] = > MSG_MAP(DisableSmuFeaturesHigh, PPSMC_MSG_DisableSmuFeaturesHigh, 1), > MSG_MAP(GetEnabledSmuFeaturesLow, PPSMC_MSG_GetRunningSmuFeaturesLow, 1), > MSG_MAP(GetEnabledSmuFeaturesHigh, PPSMC_MSG_GetRunningSmuFeaturesHigh, 1), > - MSG_MAP(SetWorkloadMask, PPSMC_MSG_SetWorkloadMask, 1), > + MSG_MAP(SetWorkloadMask, PPSMC_MSG_SetWorkloadMask, 0), > MSG_MAP(SetPptLimit, PPSMC_MSG_SetPptLimit, 0), > MSG_MAP(SetDriverDramAddrHigh, PPSMC_MSG_SetDriverDramAddrHigh, 1), > MSG_MAP(SetDriverDramAddrLow, PPSMC_MSG_SetDriverDramAddrLow, 1), > @@ -140,7 +140,7 @@ static struct cmn2asic_msg_mapping smu_v13_0_0_message_map[SMU_MSG_MAX_COUNT] = > MSG_MAP(ExitBaco, PPSMC_MSG_ExitBaco, 0), > MSG_MAP(SetSoftMinByFreq, PPSMC_MSG_SetSoftMinByFreq, 1), > MSG_MAP(SetSoftMaxByFreq, PPSMC_MSG_SetSoftMaxByFreq, 1), > - MSG_MAP(SetHardMinByFreq, PPSMC_MSG_SetHardMinByFreq, 1), > + MSG_MAP(SetHardMinByFreq, PPSMC_MSG_SetHardMinByFreq, 0), > MSG_MAP(SetHardMaxByFreq, PPSMC_MSG_SetHardMaxByFreq, 0), > MSG_MAP(GetMinDpmFreq, PPSMC_MSG_GetMinDpmFreq, 1), > MSG_MAP(GetMaxDpmFreq, PPSMC_MSG_GetMaxDpmFreq, 1), > @@ -149,7 +149,7 @@ static struct cmn2asic_msg_mapping smu_v13_0_0_message_map[SMU_MSG_MAX_COUNT] = > MSG_MAP(PowerDownVcn, PPSMC_MSG_PowerDownVcn, 0), > MSG_MAP(PowerUpJpeg, PPSMC_MSG_PowerUpJpeg, 0), > MSG_MAP(PowerDownJpeg, PPSMC_MSG_PowerDownJpeg, 0), > - MSG_MAP(GetDcModeMaxDpmFreq, PPSMC_MSG_GetDcModeMaxDpmFreq, 1), > + MSG_MAP(GetDcModeMaxDpmFreq, PPSMC_MSG_GetDcModeMaxDpmFreq, 0), > MSG_MAP(OverridePcieParameters, PPSMC_MSG_OverridePcieParameters, 0), > MSG_MAP(DramLogSetDramAddrHigh, PPSMC_MSG_DramLogSetDramAddrHigh, 0), > MSG_MAP(DramLogSetDramAddrLow, PPSMC_MSG_DramLogSetDramAddrLow, 0), |
