[Public] Hi all, This week is the last test set for the year, the testing will resume the week of the 6th of January 2025. Have a great holiday break everyone! This week this patchset was tested on 4 systems, two dGPU and two APU based, and tested across multiple display and connection types. APU * Single Display eDP -> 1080p 60hz, 2560x1600 120hz, 1920x1200 165hz * Single Display DP (SST DSC) -> 4k144hz, 4k240hz * Multi display -> eDP + DP/HDMI/USB-C -> 1080p 60hz eDP + 4k 144hz, 4k 240hz (Includes USB-C to DP/HDMI adapters) * Thunderbolt -> LG Ultrafine 5k * MST DSC -> Cable Matters 101075 (DP to 3x DP) with 3x 4k60hz displays, HP Hook G2 with 2x 4k60hz displays * USB 4 -> HP Hook G4, Lenovo Thunderbolt Dock, both with 2x 4k60hz DP and 1x 4k60hz HDMI displays * SST PCON -> Club3D CAC-1085 + 1x 4k 144hz, FRL3, at a max resolution supported by the dongle of 4k 120hz YUV420 12bpc. * MST PCON -> 1x 4k 144hz, FRL3, at a max resolution supported by the adapter of 4k 120hz RGB 8bpc. DGPU * Single Display DP (SST DSC) -> 4k144hz, 4k240hz * Multiple Display DP -> 4k240hz + 4k144hz * MST (Startech MST14DP123DP [DP to 3x DP] and 2x 4k 60hz displays) * MST DSC (with Cable Matters 101075 [DP to 3x DP] with 3x 4k60hz displays) The testing is a mix of automated and manual tests. Manual testing includes (but is not limited to) * Changing display configurations and settings * Video/Audio playback * Benchmark testing * Suspend/Resume testing * Feature testing (Freesync, HDCP, etc.) Automated testing includes (but is not limited to) * Script testing (scripts to automate some of the manual checks) * IGT testing The testing is mainly tested on the following displays, but occasionally there are tests with other displays * Samsung G8 Neo 4k240hz * Samsung QN55QN95B 4k 120hz * Acer XV322QKKV 4k144hz * HP U27 4k Wireless 4k60hz * LG 27UD58B 4k60hz * LG 32UN650WA 4k60hz * LG Ultrafine 5k 5k60hz * AU Optronics B140HAN01.1 1080p 60hz eDP * AU Optronics B160UAN01.J 1920x1200 165hz eDP * AU Optronics B160QAN02.L 2560x1600 120hz eDP The patchset consists of the amd-staging-drm-next branch (Head commit - 179c7f1e901522b474135c66a5ba00e7a743eb89 -> drm/amd/display: 3.2.314) with new patches added on top of it. Tested on Ubuntu 24.04.1, on Wayland and X11, using KDE Plasma and Gnome. Tested-by: Daniel Wheeler <daniel.wheeler@xxxxxxx> Thank you, Dan Wheeler Sr. Technologist | AMD SW Display ------------------------------------------------------------------------------------------------------------------ 1 Commerce Valley Dr E, Thornhill, ON L3T 7X6 Facebook | Twitter | amd.com -----Original Message----- From: Roman.Li@xxxxxxx <Roman.Li@xxxxxxx> Sent: Friday, December 20, 2024 4:48 PM To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx Cc: Wentland, Harry <Harry.Wentland@xxxxxxx>; Li, Sun peng (Leo) <Sunpeng.Li@xxxxxxx>; Siqueira, Rodrigo <Rodrigo.Siqueira@xxxxxxx>; Pillai, Aurabindo <Aurabindo.Pillai@xxxxxxx>; Li, Roman <Roman.Li@xxxxxxx>; Lin, Wayne <Wayne.Lin@xxxxxxx>; Chung, ChiaHsuan (Tom) <ChiaHsuan.Chung@xxxxxxx>; Zuo, Jerry <Jerry.Zuo@xxxxxxx>; Mohamed, Zaeem <Zaeem.Mohamed@xxxxxxx>; Chiu, Solomon <Solomon.Chiu@xxxxxxx>; Wheeler, Daniel <Daniel.Wheeler@xxxxxxx>; Li, Roman <Roman.Li@xxxxxxx> Subject: [PATCH 00/28] DC Patches December 20, 2024 From: Roman Li <Roman.Li@xxxxxxx> - Improvements for DP, Replay/PSR, DML, SPL, DCN32, DCN35, DCN401 - Extended logging for DSC, VABC and stream crc - Optimization for cursor position updates Aric Cyr (1): drm/amd/display: Optimize cursor position updates Aurabindo Pillai (1): drm/amd/display: Add guards around MAX/MIN Brandon Syu (1): drm/amd/display: modify init dc_power_state Dennis.Chan (1): drm/amd/display: Implement Replay Low Hz Visual Confirm Dillon Varone (1): drm/amd/display: Cleanup outdated interfaces in dcn401_clk_mgr Fangzhi Zuo (1): drm/amd/display: Add Interface to Dump DSC Caps from dm George Shen (5): drm/amd/display: Parse RECEIVE_PORT0_CAP capabilities from DPCD drm/amd/display: Add DP required HBlank size calc to link interface drm/amd/display: Add expanded HBlank field to dc_crtc_timing drm/amd/display: Add HBlank reduction DPCD write to DPMS sequence drm/amd/display: Add 6bpc RGB case for dcn32 output bpp calculations Iswara Nagulendran (1): drm/amd/display: Add VC for VESA Aux Backlight Control Karthi Kandasamy (2): drm/amd/display: Update dc_tiling_info union to structure drm/amd/display: Ensure correct GFX tiling info passed to DML Martin Leung (1): drm/amd/display: Promote DC to 3.2.315 Natanel Roizenman (1): drm/amd/display: correct type mismatches in comparisons in DML2 Peichen Huang (1): drm/amd/display: have pretrain for dpia Roman Li (1): drm/amd/display: Add check for granularity in dml ceil/floor helpers Samson Tam (2): drm/amd/display: fix init_adj offset for cositing in SPL drm/amd/display: Clean up SPL code Tom Chung (2): drm/amd/display: Fix PSR-SU not support but still call the amdgpu_dm_psr_enable drm/amd/display: Disable replay and psr while VRR is enabled Wayne Lin (4): drm/amd/display: Add support for setting multiple CRC windows in dc drm/amd/display: Extend dc_stream_get_crc to support 2nd crc engine drm/amd/display: Adjust dm to use supported interfaces for setting multiple crc windows drm/amd/display: Extend capability to get multiple ROI CRCs Yihan Zhu (2): drm/amd/display: update sequential pg logic DCN35 drm/amd/display: power up all gating blocks when releasing hw DCN35 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 31 ++- .../drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c | 214 ++++++++++++---- .../drm/amd/display/amdgpu_dm/amdgpu_dm_crc.h | 23 +- .../amd/display/amdgpu_dm/amdgpu_dm_crtc.c | 2 +- .../amd/display/amdgpu_dm/amdgpu_dm_crtc.h | 2 +- .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 31 +-- .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 6 + .../display/amdgpu_dm/amdgpu_dm_irq_params.h | 4 +- .../amd/display/amdgpu_dm/amdgpu_dm_plane.c | 17 +- .../amd/display/amdgpu_dm/amdgpu_dm_plane.h | 2 +- .../dc/clk_mgr/dcn401/dcn401_clk_mgr.c | 240 ++---------------- drivers/gpu/drm/amd/display/dc/core/dc.c | 75 +++++- .../drm/amd/display/dc/core/dc_hw_sequencer.c | 38 +++ .../drm/amd/display/dc/core/dc_link_exports.c | 8 + .../gpu/drm/amd/display/dc/core/dc_stream.c | 2 + drivers/gpu/drm/amd/display/dc/dc.h | 38 ++- drivers/gpu/drm/amd/display/dc/dc_dp_types.h | 16 ++ drivers/gpu/drm/amd/display/dc/dc_dsc.h | 5 + drivers/gpu/drm/amd/display/dc/dc_hw_types.h | 179 +++++++------ drivers/gpu/drm/amd/display/dc/dc_stream.h | 6 + drivers/gpu/drm/amd/display/dc/dc_types.h | 26 +- .../drm/amd/display/dc/dce/dce_mem_input.c | 10 +- .../display/dc/dce110/dce110_mem_input_v.c | 8 +- .../dc/dce110/dce110_timing_generator.c | 32 ++- .../dc/dce110/dce110_timing_generator.h | 2 +- .../dc/dce120/dce120_timing_generator.c | 34 ++- .../dc/dio/dcn35/dcn35_dio_link_encoder.c | 80 ++++++ .../dc/dio/dcn35/dcn35_dio_link_encoder.h | 18 ++ drivers/gpu/drm/amd/display/dc/dm_helpers.h | 5 + .../dc/dml/dcn32/display_mode_vba_util_32.c | 4 + .../drm/amd/display/dc/dml/dml_inline_defs.h | 8 + .../dc/dml2/dml21/dml21_translation_helper.c | 16 +- .../dml2/dml21/src/dml2_dpmm/dml2_dpmm_dcn4.c | 12 +- .../dml2/dml21/src/dml2_pmo/dml2_pmo_dcn3.c | 6 +- .../dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c | 30 +-- .../drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c | 7 +- .../amd/display/dc/dpp/dcn401/dcn401_dpp_cm.c | 6 +- drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c | 45 ++++ .../amd/display/dc/hubp/dcn10/dcn10_hubp.c | 4 +- .../amd/display/dc/hubp/dcn10/dcn10_hubp.h | 4 +- .../amd/display/dc/hubp/dcn20/dcn20_hubp.c | 12 +- .../amd/display/dc/hubp/dcn20/dcn20_hubp.h | 2 +- .../amd/display/dc/hubp/dcn201/dcn201_hubp.c | 2 +- .../amd/display/dc/hubp/dcn30/dcn30_hubp.c | 4 +- .../amd/display/dc/hubp/dcn30/dcn30_hubp.h | 4 +- .../amd/display/dc/hubp/dcn35/dcn35_hubp.c | 2 +- .../amd/display/dc/hubp/dcn35/dcn35_hubp.h | 2 +- .../amd/display/dc/hubp/dcn401/dcn401_hubp.c | 14 +- .../amd/display/dc/hubp/dcn401/dcn401_hubp.h | 4 +- .../amd/display/dc/hwss/dcn35/dcn35_hwseq.c | 41 ++- .../amd/display/dc/hwss/dcn35/dcn35_hwseq.h | 2 + .../amd/display/dc/hwss/dcn35/dcn35_init.c | 1 + .../drm/amd/display/dc/hwss/hw_sequencer.h | 6 +- drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h | 4 +- .../drm/amd/display/dc/inc/hw/link_encoder.h | 8 + .../gpu/drm/amd/display/dc/inc/hw/mem_input.h | 4 +- drivers/gpu/drm/amd/display/dc/inc/hw/optc.h | 2 +- .../amd/display/dc/inc/hw/timing_generator.h | 2 +- drivers/gpu/drm/amd/display/dc/inc/link.h | 4 + .../amd/display/dc/link/hwss/link_hwss_dio.c | 4 +- .../amd/display/dc/link/hwss/link_hwss_dpia.c | 61 ++++- .../amd/display/dc/link/hwss/link_hwss_dpia.h | 3 + .../drm/amd/display/dc/link/link_detection.c | 3 +- .../gpu/drm/amd/display/dc/link/link_dpms.c | 20 +- .../drm/amd/display/dc/link/link_factory.c | 1 + .../drm/amd/display/dc/link/link_validation.c | 179 +++++++++++++ .../drm/amd/display/dc/link/link_validation.h | 5 + .../dc/link/protocols/link_dp_capability.c | 5 + .../dc/link/protocols/link_dp_irq_handler.c | 5 +- .../amd/display/dc/optc/dcn10/dcn10_optc.c | 33 ++- .../amd/display/dc/optc/dcn10/dcn10_optc.h | 19 ++ .../dc/resource/dcn35/dcn35_resource.c | 9 +- .../dc/resource/dcn35/dcn35_resource.h | 1 + .../dc/resource/dcn351/dcn351_resource.c | 2 +- .../dc/resource/dcn401/dcn401_resource.c | 3 +- drivers/gpu/drm/amd/display/dc/spl/dc_spl.c | 99 ++++---- .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 64 ++++- 77 files changed, 1356 insertions(+), 576 deletions(-) -- 2.34.1