On 21/11/2024 16:19, Christian König wrote:
Am 21.11.24 um 14:10 schrieb Shashank Sharma:
From: Alex Deucher <alexander.deucher@xxxxxxx>
Set the addresses for the UQ metadata.
V2: Fix lower offset mask (Shashank)
Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx>
Signed-off-by: Shashank Sharma <shashank.sharma@xxxxxxx>
---
drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
b/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
index eb35ec9f3da2..fc9cb989aa6b 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
@@ -887,6 +887,9 @@ static int sdma_v7_0_mqd_init(struct
amdgpu_device *adev, void *mqd,
m->sdmax_rlcx_rb_aql_cntl = 0x4000;
//regSDMA0_QUEUE0_RB_AQL_CNTL_DEFAULT;
m->sdmax_rlcx_dummy_reg = 0xf;
//regSDMA0_QUEUE0_DUMMY_REG_DEFAULT;
+ m->sdmax_rlcx_csa_addr_lo = prop->csa_addr & 0xFFFFFFFC;
Please use lower_32_bits() macro here.
If the lower bits can't be set on the CSA address we should have
rejected that in the IOCTL and not silently mask that here.
Noted and agreed,
Shashank
Regards,
Christian.
+ m->sdmax_rlcx_csa_addr_hi = upper_32_bits(prop->csa_addr);
+
return 0;
}
