[AMD Official Use Only - AMD Internal Distribution Only] Reviewed-by: Kenneth Feng kenneth.feng@xxxxxxx -----Original Message----- From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Alex Deucher Sent: Friday, October 25, 2024 6:10 AM To: Deucher, Alexander <Alexander.Deucher@xxxxxxx> Cc: amd-gfx@xxxxxxxxxxxxxxxxxxxxx Subject: Re: [PATCH] drm/amdgpu/smu13: fix profile reporting Caution: This message originated from an External Source. Use proper caution when opening attachments, clicking links, or responding. Ping? On Wed, Oct 23, 2024 at 9:23 AM Alex Deucher <alexander.deucher@xxxxxxx> wrote: > > The following 3 commits landed in parallel: > commit d7d2688bf4ea ("drm/amd/pm: update workload mask after the > setting") commit 7a1613e47e65 ("drm/amdgpu/smu13: always apply the > powersave optimization") commit 7c210ca5a2d7 ("drm/amdgpu: handle > default profile on on devices without fullscreen 3D") While everything > is set correctly, this caused the profile to be reported incorrectly > because both the powersave and fullscreen3d bits were set in the mask > and when the driver prints the profile, it looks for the first bit set. > > Fixes: d7d2688bf4ea ("drm/amd/pm: update workload mask after the > setting") > Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx> > --- > drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c > b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c > index cb923e33fd6f..d53e162dcd8d 100644 > --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c > +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c > @@ -2485,7 +2485,7 @@ static int smu_v13_0_0_set_power_profile_mode(struct smu_context *smu, > DpmActivityMonitorCoeffInt_t *activity_monitor = > &(activity_monitor_external.DpmActivityMonitorCoeffInt); > int workload_type, ret = 0; > - u32 workload_mask; > + u32 workload_mask, selected_workload_mask; > > smu->power_profile_mode = input[size]; > > @@ -2552,7 +2552,7 @@ static int smu_v13_0_0_set_power_profile_mode(struct smu_context *smu, > if (workload_type < 0) > return -EINVAL; > > - workload_mask = 1 << workload_type; > + selected_workload_mask = workload_mask = 1 << workload_type; > > /* Add optimizations for SMU13.0.0/10. Reuse the power saving profile */ > if ((amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == > IP_VERSION(13, 0, 0) && @@ -2572,7 +2572,7 @@ static int smu_v13_0_0_set_power_profile_mode(struct smu_context *smu, > workload_mask, > NULL); > if (!ret) > - smu->workload_mask = workload_mask; > + smu->workload_mask = selected_workload_mask; > > return ret; > } > -- > 2.46.2 >