[AMD Official Use Only - AMD Internal Distribution Only] Ping -----Original Message----- From: Kamal, Asad <Asad.Kamal@xxxxxxx> Sent: Friday, October 4, 2024 8:31 PM To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx; Lazar, Lijo <Lijo.Lazar@xxxxxxx> Cc: Ma, Le <Le.Ma@xxxxxxx>; Zhang, Hawking <Hawking.Zhang@xxxxxxx>; Zhang, Morris <Shiwu.Zhang@xxxxxxx>; Kamal, Asad <Asad.Kamal@xxxxxxx>; Poag, Charis <Charis.Poag@xxxxxxx>; Cheung, Donald <donald.cheung@xxxxxxx>; Khatir, Sepehr <sepehr.khatir@xxxxxxx>; Oliveira, Daniel <Daniel.Oliveira@xxxxxxx> Subject: [PATCH 1/2] drm/amd/pm: Update SMUv13.0.6 PMFW headers Update pmfw headers for smuv13.0.6 to version 0xE Signed-off-by: Asad Kamal <asad.kamal@xxxxxxx> --- drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_pmfw.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_pmfw.h b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_pmfw.h index 822c6425d90e..0f96b8c59a0e 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_pmfw.h +++ b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_pmfw.h @@ -123,7 +123,7 @@ typedef enum { VOLTAGE_GUARDBAND_COUNT } GFX_GUARDBAND_e; -#define SMU_METRICS_TABLE_VERSION 0xD +#define SMU_METRICS_TABLE_VERSION 0xE typedef struct __attribute__((packed, aligned(4))) { uint32_t AccumulationCounter; @@ -231,6 +231,9 @@ typedef struct __attribute__((packed, aligned(4))) { // PER XCD ACTIVITY uint32_t GfxBusy[8]; uint64_t GfxBusyAcc[8]; + + //PCIE BW Data and error count + uint32_t PCIeOtherEndRecoveryAcc; // The Pcie counter itself is accumulated } MetricsTableX_t; typedef struct __attribute__((packed, aligned(4))) { -- 2.46.0