Re: [PATCH 1/2] drm/amdgpu: Fetch NPS mode for GCv9.4.3 VFs

["Chander, Vignesh" <Vignesh.Chander@xxxxxxx>]

[AMD Official Use Only - AMD Internal Distribution Only]

Reviewed-by: Vignesh.Chander@xxxxxxx 

Verified-by: Vignesh.Chander@xxxxxxx 

---

From: Lijo Lazar <lijo.lazar@xxxxxxx>
Sent: Tuesday, September 24, 2024 2:02:49 AM
To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx <amd-gfx@xxxxxxxxxxxxxxxxxxxxx>
Cc: Zhang, Hawking <Hawking.Zhang@xxxxxxx>; Deucher, Alexander <Alexander.Deucher@xxxxxxx>; Chander, Vignesh <Vignesh.Chander@xxxxxxx>
Subject: [PATCH 1/2] drm/amdgpu: Fetch NPS mode for GCv9.4.3 VFs

 

Use the memory ranges published in discovery table to deduce NPS mode
of GC v9.4.3 VFs.

Signed-off-by: Lijo Lazar <lijo.lazar@xxxxxxx>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 12 +++++-----
 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h |  2 +-
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c   | 30 +++++++++++++++++++++++--
 3 files changed, 36 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
index 011fe3a847d0..4d8d229ca457 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
@@ -1256,14 +1256,14 @@ void amdgpu_gmc_sysfs_fini(struct amdgpu_device *adev)
 
 int amdgpu_gmc_get_nps_memranges(struct amdgpu_device *adev,
                                  struct amdgpu_mem_partition_info *mem_ranges,
-                                int exp_ranges)
+                                uint8_t *exp_ranges)
 {
         struct amdgpu_gmc_memrange *ranges;
         int range_cnt, ret, i, j;
         uint32_t nps_type;
         bool refresh;
 
-       if (!mem_ranges)
+       if (!mem_ranges || !exp_ranges)
                 return -EINVAL;
 
         refresh = (adev->init_lvl->level != AMDGPU_INIT_LEVEL_MINIMAL_XGMI) &&
@@ -1277,16 +1277,16 @@ int amdgpu_gmc_get_nps_memranges(struct amdgpu_device *adev,
         /* TODO: For now, expect ranges and partition count to be the same.
          * Adjust if there are holes expected in any NPS domain.
          */
-       if (range_cnt != exp_ranges) {
+       if (*exp_ranges && (range_cnt != *exp_ranges)) {
                 dev_warn(
                         adev->dev,
                         "NPS config mismatch - expected ranges: %d discovery - nps mode: %d, nps ranges: %d",
-                       exp_ranges, nps_type, range_cnt);
+                       *exp_ranges, nps_type, range_cnt);
                 ret = -EINVAL;
                 goto err;
         }
 
-       for (i = 0; i < exp_ranges; ++i) {
+       for (i = 0; i < range_cnt; ++i) {
                 if (ranges[i].base_address >= ranges[i].limit_address) {
                         dev_warn(
                                 adev->dev,
@@ -1327,6 +1327,8 @@ int amdgpu_gmc_get_nps_memranges(struct amdgpu_device *adev,
                         ranges[i].limit_address - ranges[i].base_address + 1;
         }
 
+       if (!*exp_ranges)
+               *exp_ranges = range_cnt;
 err:
         kfree(ranges);
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
index d4cd247fe574..94cb4f94f43d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
@@ -467,7 +467,7 @@ void amdgpu_gmc_sysfs_fini(struct amdgpu_device *adev);
 
 int amdgpu_gmc_get_nps_memranges(struct amdgpu_device *adev,
                                  struct amdgpu_mem_partition_info *mem_ranges,
-                                int exp_ranges);
+                                uint8_t *exp_ranges);
 
 int amdgpu_gmc_request_memory_partition(struct amdgpu_device *adev,
                                         int nps_mode);
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 6a95402985ef..eb82d78c4512 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1386,11 +1386,30 @@ gmc_v9_0_get_memory_partition(struct amdgpu_device *adev, u32 *supp_modes)
         return mode;
 }
 
+static enum amdgpu_memory_partition
+gmc_v9_0_query_vf_memory_partition(struct amdgpu_device *adev)
+{
+       switch (adev->gmc.num_mem_partitions) {
+       case 0:
+               return UNKNOWN_MEMORY_PARTITION_MODE;
+       case 1:
+               return AMDGPU_NPS1_PARTITION_MODE;
+       case 2:
+               return AMDGPU_NPS2_PARTITION_MODE;
+       case 4:
+               return AMDGPU_NPS4_PARTITION_MODE;
+       default:
+               return AMDGPU_NPS1_PARTITION_MODE;
+       }
+
+       return AMDGPU_NPS1_PARTITION_MODE;
+}
+
 static enum amdgpu_memory_partition
 gmc_v9_0_query_memory_partition(struct amdgpu_device *adev)
 {
         if (amdgpu_sriov_vf(adev))
-               return AMDGPU_NPS1_PARTITION_MODE;
+               return gmc_v9_0_query_vf_memory_partition(adev);
 
         return gmc_v9_0_get_memory_partition(adev, NULL);
 }
@@ -1935,6 +1954,8 @@ gmc_v9_0_init_sw_mem_ranges(struct amdgpu_device *adev,
 
         switch (mode) {
         case UNKNOWN_MEMORY_PARTITION_MODE:
+               adev->gmc.num_mem_partitions = 0;
+               break;
         case AMDGPU_NPS1_PARTITION_MODE:
                 adev->gmc.num_mem_partitions = 1;
                 break;
@@ -1954,7 +1975,7 @@ gmc_v9_0_init_sw_mem_ranges(struct amdgpu_device *adev,
 
         /* Use NPS range info, if populated */
         r = amdgpu_gmc_get_nps_memranges(adev, mem_ranges,
-                                        adev->gmc.num_mem_partitions);
+                                        &adev->gmc.num_mem_partitions);
         if (!r) {
                 l = 0;
                 for (i = 1; i < adev->gmc.num_mem_partitions; ++i) {
@@ -1964,6 +1985,11 @@ gmc_v9_0_init_sw_mem_ranges(struct amdgpu_device *adev,
                 }
 
         } else {
+               if (!adev->gmc.num_mem_partitions) {
+                       dev_err(adev->dev,
+                               "Not able to detect NPS mode, fall back to NPS1");
+                       adev->gmc.num_mem_partitions = 1;
+               }
                 /* Fallback to sw based calculation */
                 size = (adev->gmc.real_vram_size + SZ_16M) >> AMDGPU_GPU_PAGE_SHIFT;
                 size /= adev->gmc.num_mem_partitions;
--
2.25.1