[PATCH 1/5] drm/amdgpu/gfx8: KIQ is also disabled when MEC is disabled

[deathsimple@xxxxxxxxxxx (Christian König)]

Am 30.03.2017 um 20:34 schrieb Alex Deucher:
> Set the ready flag to reflect this.
>
> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>

Patches #1 and #3-#5 are Reviewed-by: Christian König 
<christian.koenig at amd.com>

Patch #2 is Acked-by: Christian König <christian.koenig at amd.com>

> ---
>   drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 1 +
>   1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> index 1d00b04..3d4ce03 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> @@ -4561,6 +4561,7 @@ static void gfx_v8_0_cp_compute_enable(struct amdgpu_device *adev, bool enable)
>   		WREG32(mmCP_MEC_CNTL, (CP_MEC_CNTL__MEC_ME1_HALT_MASK | CP_MEC_CNTL__MEC_ME2_HALT_MASK));
>   		for (i = 0; i < adev->gfx.num_compute_rings; i++)
>   			adev->gfx.compute_ring[i].ready = false;
> +		adev->gfx.kiq.ring.ready = false;
>   	}
>   	udelay(50);
>   }