On Fri, Sep 6, 2024 at 8:52 AM Kenneth Feng <kenneth.feng@xxxxxxx> wrote: > > fix the pp_dpm_pcie issue on smu v14.0.2/3 as below: > 0: 2.5GT/s, x4 250Mhz > 1: 8.0GT/s, x4 616Mhz * > 2: 8.0GT/s, x4 1143Mhz * > the middle level can be removed since it is always skipped on > smu v14.0.2/3 > > Signed-off-by: Kenneth Feng <kenneth.feng@xxxxxxx> Acked-by: Alex Deucher <alexander.deucher@xxxxxxx> > --- > drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c > index a31fae5feedf..30f6cf0d9555 100644 > --- a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c > +++ b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c > @@ -687,6 +687,9 @@ static int smu_v14_0_2_set_default_dpm_table(struct smu_context *smu) > pcie_table->clk_freq[pcie_table->num_of_link_levels] = > skutable->LclkFreq[link_level]; > pcie_table->num_of_link_levels++; > + > + if (link_level == 0) > + link_level++; > } > > /* dcefclk dpm table setup */ > -- > 2.34.1 >
