When using SDMA for PT updates, a TLB fence hooked to a buffer objects dma resv object with usage declared as BOOKKEEP leaves a chance for TLB flush to occur prematurely. This will lead to a page fault. Raising the usage from BOOKKEEP to KERNEL removes this possibility. Signed-off-by: Dejan Andjelkovic <Dejan.Andjelkovic@xxxxxxx> --- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c index f93804902fd3..8efc2cf9bbb0 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c @@ -928,7 +928,7 @@ amdgpu_vm_tlb_flush(struct amdgpu_vm_update_params *params, /* Makes sure no PD/PT is freed before the flush */ dma_resv_add_fence(vm->root.bo->tbo.base.resv, *fence, - DMA_RESV_USAGE_BOOKKEEP); + DMA_RESV_USAGE_KERNEL); } } -- 2.43.0
