Am 29.03.2017 um 19:48 schrieb Tom St Denis:
> On gfx9 hardware the value is not wrapped and is a 64-bit value. So
> we reduce it modulo the ring size.
>
> Signed-off-by: Tom St Denis <tom.stdenis at amd.com>
Reviewed-by: Christian König <christian.koenig at amd.com>
>
> (v2) use buf_mask instead of computing on the fly
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
> index ac0ce3f27f87..130357bdc275 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
> @@ -320,8 +320,8 @@ static ssize_t amdgpu_debugfs_ring_read(struct file *f, char __user *buf,
>
> if (*pos < 12) {
> early[0] = amdgpu_ring_get_rptr(ring);
> - early[1] = amdgpu_ring_get_wptr(ring);
> - early[2] = ring->wptr;
> + early[1] = amdgpu_ring_get_wptr(ring) & ring->buf_mask;
> + early[2] = ring->wptr & ring->buf_mask;
> for (i = *pos / 4; i < 3 && size; i++) {
> r = put_user(early[i], (uint32_t *)buf);
> if (r)
