Am 27.03.2017 um 20:46 schrieb Alex Deucher:
> Match what we do for other asics.
>
> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
Reviewed-by: Christian König <christian.koenig at amd.com> for the whole set.
> ---
> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 7 ++-----
> 1 file changed, 2 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index 697270d..1d0be75 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -1226,7 +1226,7 @@ static u32 gfx_v9_0_get_rb_active_bitmap(struct amdgpu_device *adev)
> static void gfx_v9_0_setup_rb(struct amdgpu_device *adev)
> {
> int i, j;
> - u32 data, tmp, num_rbs = 0;
> + u32 data;
> u32 active_rbs = 0;
> u32 rb_bitmap_width_per_sh = adev->gfx.config.max_backends_per_se /
> adev->gfx.config.max_sh_per_se;
> @@ -1244,10 +1244,7 @@ static void gfx_v9_0_setup_rb(struct amdgpu_device *adev)
> mutex_unlock(&adev->grbm_idx_mutex);
>
> adev->gfx.config.backend_enable_mask = active_rbs;
> - tmp = active_rbs;
> - while (tmp >>= 1)
> - num_rbs++;
> - adev->gfx.config.num_rbs = num_rbs;
> + adev->gfx.config.num_rbs = hweight32(active_rbs);
> }
>
> #define DEFAULT_SH_MEM_BASES (0x6000)
