Am 23.07.24 um 10:27 schrieb Jack Xiao:
Only allow API_NUMBER_OF_COMMAND_MAX packet in mes ring buffer,
refine the code for maximum packet execution.
Signed-off-by: Jack Xiao <Jack.Xiao@xxxxxxx>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 2 ++
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 2 +-
3 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
index ad49cecb20b8..dfe487521a4a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
@@ -212,6 +212,8 @@ int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring,
*/
if (ring->funcs->type == AMDGPU_RING_TYPE_KIQ)
sched_hw_submission = max(sched_hw_submission, 256);
+ else if (ring->funcs->type == AMDGPU_RING_TYPE_MES)
+ sched_hw_submission = 32;
Yeah that looks like it makes sense.
else if (ring == &adev->sdma.instance[0].page)
sched_hw_submission = 256;
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
index 68c74adf79f1..951f13e01ee9 100644
--- a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
@@ -198,7 +198,7 @@ static int mes_v11_0_submit_pkt_and_poll_completion(struct amdgpu_mes *mes,
seq = ++ring->fence_drv.sync_seq;
r = amdgpu_fence_wait_polling(ring,
- seq - ring->fence_drv.num_fences_mask,
+ seq - (API_NUMBER_OF_COMMAND_MAX/2 - 1),
This looks a bit questionable. amdgpu_fence_wait_polling() doesn't apply
the fence mask to the polled value.
So what happens if that overruns?
Additional to that we should really keep that logic in
amdgpu_fence_emit_polling() and not each individual MES generation.
Regards,
Christian.
timeout);
if (r < 1)
goto error_undo;
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
index 48e01206bcc4..dc65f28d1795 100644
--- a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
@@ -184,7 +184,7 @@ static int mes_v12_0_submit_pkt_and_poll_completion(struct amdgpu_mes *mes,
seq = ++ring->fence_drv.sync_seq;
r = amdgpu_fence_wait_polling(ring,
- seq - ring->fence_drv.num_fences_mask,
+ seq - (API_NUMBER_OF_COMMAND_MAX/2 - 1),
timeout);
if (r < 1)
goto error_undo;
