[Public]
Hi all,
This week this patchset was tested on the following systems:
* Lenovo ThinkBook T13s Gen4 with AMD Ryzen 5 6600U
* MSI Gaming X Trio RX 6800
* Gigabyte Gaming OC RX 7900 XTX
These systems were tested on the following display/connection types:
* eDP, (1080p 60hz [5650U]) (1920x1200 60hz [6600U]) (2560x1600 120hz[6600U])
* VGA and DVI (1680x1050 60hz [DP to VGA/DVI, USB-C to VGA/DVI])
* DP/HDMI/USB-C (1440p 170hz, 4k 60hz, 4k 144hz, 4k 240hz [Includes USB-C to DP/HDMI adapters])
* Thunderbolt (LG Ultrafine 5k)
* MST (Startech MST14DP123DP [DP to 3x DP] and 2x 4k 60Hz displays)
* DSC (with Cable Matters 101075 [DP to 3x DP] with 3x 4k60 displays, and HP Hook G2 with 1 4k60 display)
* USB 4 (Kensington SD5700T and 1x 4k 60Hz display)
* PCON (Club3D CAC-1085 and 1x 4k 144Hz display [at 4k 120HZ, as that is the max the adapter supports])
The testing is a mix of automated and manual tests. Manual testing includes (but is not limited to):
* Changing display configurations and settings
* Benchmark testing
* Feature testing (Freesync, etc.)
Automated testing includes (but is not limited to):
* Script testing (scripts to automate some of the manual checks)
* IGT testing
The patchset consists of the amd-staging-drm-next branch (Head commit - 18e60d38308b -> drm/amdgpu: timely save bad pages to eeprom after gpu ras reset is completed) with new patches added on top of it.
Tested on Ubuntu 24.04.1, on Wayland and X11, using KDE Plasma and Gnome.
Tested-by: Daniel Wheeler <daniel.wheeler@xxxxxxx>
Thank you,
Dan Wheeler
Sr. Technologist | AMD
SW Display
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1 Commerce Valley Dr E, Thornhill, ON L3T 7X6
amd.com
-----Original Message-----
From: Aurabindo Pillai <aurabindo.pillai@xxxxxxx>
Sent: Wednesday, July 17, 2024 3:39 PM
To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Cc: Wentland, Harry <Harry.Wentland@xxxxxxx>; Li, Sun peng (Leo) <Sunpeng.Li@xxxxxxx>; Siqueira, Rodrigo <Rodrigo.Siqueira@xxxxxxx>; Pillai, Aurabindo <Aurabindo.Pillai@xxxxxxx>; Li, Roman <Roman.Li@xxxxxxx>; Lin, Wayne <Wayne.Lin@xxxxxxx>; Gutierrez, Agustin <Agustin.Gutierrez@xxxxxxx>; Chung, ChiaHsuan (Tom) <ChiaHsuan.Chung@xxxxxxx>; Zuo, Jerry <Jerry.Zuo@xxxxxxx>; Mohamed, Zaeem <Zaeem.Mohamed@xxxxxxx>; Pillai, Aurabindo <Aurabindo.Pillai@xxxxxxx>; Wheeler, Daniel <Daniel.Wheeler@xxxxxxx>
Subject: [PATCH 00/22] DC Patches for 15 July, 2024
This DC patchset brings improvements in multiple areas. In summary, we have:
* bug fixes for SubVP, DML, SPL, DCCG, and various stability fixes
* more reorganization of code into corresponding sub components
* renaming certain variables in DML to better reflect their relevance.
Cc: Daniel Wheeler <daniel.wheeler@xxxxxxx>
Alex Hung (2):
drm/amd/display: Add MST debug message when link detection fails
drm/amd/display: Check link_res->hpo_dp_link_enc before using it
Aric Cyr (1):
drm/amd/display: 3.2.293
Aurabindo Pillai (3):
drm/amd/display: rename dcn3/dcn4 to more sound terms
drm/amd/display: rename dcn401_soc to dcn4_variant_a_soc
drm/amd/display: remove unused folder
Austin Zheng (1):
drm/amd/display: Check if Mode is Supported Before Returning Result
Dillon Varone (2):
drm/amd/display: Remove hardmax usage for dcn401
drm/amd/display: Various DML2 fixes for FAMS2
Gabe Teeger (1):
drm/amd/display: Fix Potential Null Dereference
Hansen Dsouza (3):
drm/amd/display: Add private data type for RCG
drm/amd/display: Add RCG helper functions
drm/amd/display: Add source select helper functions
Ilya Bakoulin (1):
drm/amd/display: Add helper function to check for non-address fast
updates
Joshua Aberback (1):
drm/amd/display: Remove duplicate HWSS interfaces
Revalla Hari Krishna (1):
drm/amd/display: Refactoring HPO
Rodrigo Siqueira (2):
drm/amd/display: Remove ASSERT if significance is zero in math_ceil2
drm/amd/display: Remove old comments
Ryan Seto (1):
drm/amd/display: Fix visual confirm bug for SubVP
Samson Tam (1):
drm/amd/display: ensure EASF and ISHARP coefficients are programmed
together
Sung Joon Kim (2):
drm/amd/display: Check for NULL pointer
drm/amd/display: Check top sink only when multiple streams for DP2
.../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 5 +-
.../display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c | 6 +-
.../dc/clk_mgr/dcn401/dcn401_clk_mgr.c | 44 +-
drivers/gpu/drm/amd/display/dc/core/dc.c | 36 +-
.../gpu/drm/amd/display/dc/core/dc_surface.c | 3 +-
drivers/gpu/drm/amd/display/dc/dc.h | 8 +-
.../amd/display/dc/dccg/dcn35/dcn35_dccg.c | 712 ++++++++++++++++++
drivers/gpu/drm/amd/display/dc/dcn30/Makefile | 2 -
.../gpu/drm/amd/display/dc/dcn303/Makefile | 13 -
drivers/gpu/drm/amd/display/dc/dcn31/Makefile | 2 +-
.../gpu/drm/amd/display/dc/dcn401/Makefile | 10 -
.../drm/amd/display/dc/dml/dcn32/dcn32_fpu.c | 4 +-
.../amd/display/dc/dml/dcn321/dcn321_fpu.c | 4 +-
.../dc/dml2/dml21/dml21_translation_helper.c | 51 +-
.../dc/dml2/dml21/dml21_translation_helper.h | 2 +-
.../amd/display/dc/dml2/dml21/dml21_utils.c | 24 +-
.../dml21/inc/bounding_boxes/dcn3_soc_bb.h | 8 +-
.../dml21/inc/bounding_boxes/dcn4_soc_bb.h | 10 +-
.../dml21/inc/dml_top_display_cfg_types.h | 1 -
.../dml21/inc/dml_top_soc_parameter_types.h | 10 +-
.../display/dc/dml2/dml21/inc/dml_top_types.h | 10 +-
.../dml2/dml21/src/dml2_core/dml2_core_dcn4.c | 2 +-
.../src/dml2_core/dml2_core_dcn4_calcs.c | 186 ++---
.../dml21/src/dml2_core/dml2_core_shared.c | 192 ++---
.../dml2/dml21/src/dml2_dpmm/dml2_dpmm_dcn4.c | 130 ++--
.../dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c | 2 +-
.../lib_float_math.c | 2 -
.../dc/dml2/dml21/src/dml2_top/dml_top.c | 3 +-
.../amd/display/dc/dml2/dml2_internal_types.h | 1 +
.../display/dc/dml2/dml2_translation_helper.c | 41 +-
.../display/dc/dml2/dml2_translation_helper.h | 2 +-
.../gpu/drm/amd/display/dc/dml2/dml2_utils.c | 6 +-
.../display/dc/dpp/dcn401/dcn401_dpp_dscl.c | 28 +-
drivers/gpu/drm/amd/display/dc/hpo/Makefile | 15 +
.../dcn31/dcn31_hpo_dp_link_encoder.c | 0
.../dcn31/dcn31_hpo_dp_link_encoder.h | 0
.../dcn31/dcn31_hpo_dp_stream_encoder.c | 0
.../dcn31/dcn31_hpo_dp_stream_encoder.h | 0
.../display/dc/hubbub/dcn401/dcn401_hubbub.c | 364 ++++-----
.../amd/display/dc/hwss/dce110/dce110_hwseq.c | 1 -
.../amd/display/dc/hwss/dcn10/dcn10_hwseq.c | 10 +-
.../amd/display/dc/hwss/dcn10/dcn10_init.c | 2 -
.../amd/display/dc/hwss/dcn20/dcn20_hwseq.c | 2 +-
.../amd/display/dc/hwss/dcn20/dcn20_init.c | 1 -
.../amd/display/dc/hwss/dcn201/dcn201_init.c | 1 -
.../amd/display/dc/hwss/dcn21/dcn21_init.c | 2 -
.../amd/display/dc/hwss/dcn30/dcn30_hwseq.c | 8 +-
.../amd/display/dc/hwss/dcn30/dcn30_init.c | 1 -
.../amd/display/dc/hwss/dcn301/dcn301_init.c | 1 -
.../amd/display/dc/hwss/dcn31/dcn31_init.c | 2 -
.../amd/display/dc/hwss/dcn314/dcn314_init.c | 2 -
.../amd/display/dc/hwss/dcn32/dcn32_hwseq.c | 8 +-
.../amd/display/dc/hwss/dcn32/dcn32_init.c | 1 -
.../amd/display/dc/hwss/dcn35/dcn35_hwseq.c | 8 +-
.../amd/display/dc/hwss/dcn35/dcn35_init.c | 2 -
.../amd/display/dc/hwss/dcn351/dcn351_init.c | 2 -
.../amd/display/dc/hwss/dcn401/dcn401_hwseq.c | 11 +-
.../amd/display/dc/hwss/dcn401/dcn401_init.c | 2 -
.../drm/amd/display/dc/hwss/hw_sequencer.h | 1 -
.../display/dc/hwss/hw_sequencer_private.h | 2 -
.../gpu/drm/amd/display/dc/inc/hw/mem_input.h | 2 +-
.../display/dc/link/hwss/link_hwss_hpo_dp.c | 5 +
62 files changed, 1401 insertions(+), 615 deletions(-) delete mode 100644 drivers/gpu/drm/amd/display/dc/dcn303/Makefile
delete mode 100644 drivers/gpu/drm/amd/display/dc/dcn401/Makefile
rename drivers/gpu/drm/amd/display/dc/{ => hpo}/dcn31/dcn31_hpo_dp_link_encoder.c (100%) rename drivers/gpu/drm/amd/display/dc/{ => hpo}/dcn31/dcn31_hpo_dp_link_encoder.h (100%) rename drivers/gpu/drm/amd/display/dc/{ => hpo}/dcn31/dcn31_hpo_dp_stream_encoder.c (100%) rename drivers/gpu/drm/amd/display/dc/{ => hpo}/dcn31/dcn31_hpo_dp_stream_encoder.h (100%)
--
2.39.2
