Sample output: IP: sdma_v5_2 num_instances:2 Instance:0 mmSDMA0_STATUS_REG 0x46deed57 mmSDMA0_STATUS1_REG 0x000003ff mmSDMA0_STATUS2_REG 0x00003f20 mmSDMA0_STATUS3_REG 0x03f60000 mmSDMA0_UCODE_CHECKSUM 0x716360f5 mmSDMA0_RB_RPTR_FETCH_HI 0x00000000 mmSDMA0_RB_RPTR_FETCH 0x00004980 mmSDMA0_UTCL1_RD_STATUS 0x01891555 mmSDMA0_UTCL1_WR_STATUS 0x51811555 mmSDMA0_UTCL1_RD_XNACK0 0x00155828 mmSDMA0_UTCL1_RD_XNACK1 0x02a6a700 mmSDMA0_UTCL1_WR_XNACK0 0x00111558 mmSDMA0_UTCL1_WR_XNACK1 0x01c1c100 mmSDMA0_GFX_RB_CNTL 0x80871016 mmSDMA0_GFX_RB_RPTR 0x00004980 mmSDMA0_GFX_RB_RPTR_HI 0x00000000 mmSDMA0_GFX_RB_WPTR 0x00004980 mmSDMA0_GFX_RB_WPTR_HI 0x00000000 mmSDMA0_GFX_IB_OFFSET 0x00000000 mmSDMA0_GFX_IB_BASE_LO 0x00928600 mmSDMA0_GFX_IB_BASE_HI 0x00000000 mmSDMA0_GFX_IB_CNTL 0x00000100 mmSDMA0_GFX_IB_RPTR 0x000001a0 mmSDMA0_GFX_IB_SUB_REMAIN 0x00000000 mmSDMA0_GFX_DUMMY_REG 0x000000af mmSDMA0_PAGE_RB_CNTL 0x80870000 mmSDMA0_PAGE_RB_RPTR 0x00000000 mmSDMA0_PAGE_RB_RPTR_HI 0x00000000 mmSDMA0_PAGE_RB_WPTR 0x00000000 mmSDMA0_PAGE_RB_WPTR_HI 0x00000000 mmSDMA0_PAGE_IB_OFFSET 0x00000000 mmSDMA0_PAGE_IB_BASE_LO 0x00000000 mmSDMA0_PAGE_IB_BASE_HI 0x00000000 mmSDMA0_PAGE_DUMMY_REG 0x0000000f mmSDMA0_RLC0_RB_CNTL 0x80070000 mmSDMA0_RLC0_RB_RPTR 0x00000000 mmSDMA0_RLC0_RB_RPTR_HI 0x00000000 mmSDMA0_RLC0_RB_WPTR 0x00000000 mmSDMA0_RLC0_RB_WPTR_HI 0x00000000 mmSDMA0_RLC0_IB_OFFSET 0x00000000 mmSDMA0_RLC0_IB_BASE_LO 0x00000000 mmSDMA0_RLC0_IB_BASE_HI 0x00000000 mmSDMA0_RLC0_DUMMY_REG 0x0000000f mmSDMA0_INT_STATUS 0x000000e0 mmSDMA0_VM_CNTL 0xffffffff mmGRBM_STATUS2 0x54000008 Instance:1 mmSDMA0_STATUS_REG 0x46deed57 mmSDMA0_STATUS1_REG 0x000003ff mmSDMA0_STATUS2_REG 0x000043ad mmSDMA0_STATUS3_REG 0x03f60000 mmSDMA0_UCODE_CHECKSUM 0x716360f5 mmSDMA0_RB_RPTR_FETCH_HI 0x00000000 mmSDMA0_RB_RPTR_FETCH 0x00003d00 mmSDMA0_UTCL1_RD_STATUS 0x01891555 mmSDMA0_UTCL1_WR_STATUS 0x51811555 mmSDMA0_UTCL1_RD_XNACK0 0x00155827 mmSDMA0_UTCL1_RD_XNACK1 0x021a1b00 mmSDMA0_UTCL1_WR_XNACK0 0x00111558 mmSDMA0_UTCL1_WR_XNACK1 0x01656500 mmSDMA0_GFX_RB_CNTL 0x80871016 mmSDMA0_GFX_RB_RPTR 0x00003d00 mmSDMA0_GFX_RB_RPTR_HI 0x00000000 mmSDMA0_GFX_RB_WPTR 0x00003d00 mmSDMA0_GFX_RB_WPTR_HI 0x00000000 mmSDMA0_GFX_IB_OFFSET 0x00000000 mmSDMA0_GFX_IB_BASE_LO 0x00927200 mmSDMA0_GFX_IB_BASE_HI 0x00000000 mmSDMA0_GFX_IB_CNTL 0x00000100 mmSDMA0_GFX_IB_RPTR 0x000001a0 mmSDMA0_GFX_IB_SUB_REMAIN 0x00000000 mmSDMA0_GFX_DUMMY_REG 0x000000af mmSDMA0_PAGE_RB_CNTL 0x80870000 mmSDMA0_PAGE_RB_RPTR 0x00000000 mmSDMA0_PAGE_RB_RPTR_HI 0x00000000 mmSDMA0_PAGE_RB_WPTR 0x00000000 mmSDMA0_PAGE_RB_WPTR_HI 0x00000000 mmSDMA0_PAGE_IB_OFFSET 0x00000000 mmSDMA0_PAGE_IB_BASE_LO 0x00000000 mmSDMA0_PAGE_IB_BASE_HI 0x00000000 mmSDMA0_PAGE_DUMMY_REG 0x0000000f mmSDMA0_RLC0_RB_CNTL 0x80070000 mmSDMA0_RLC0_RB_RPTR 0x00000000 mmSDMA0_RLC0_RB_RPTR_HI 0x00000000 mmSDMA0_RLC0_RB_WPTR 0x00000000 mmSDMA0_RLC0_RB_WPTR_HI 0x00000000 mmSDMA0_RLC0_IB_OFFSET 0x00000000 mmSDMA0_RLC0_IB_BASE_LO 0x00000000 mmSDMA0_RLC0_IB_BASE_HI 0x00000000 mmSDMA0_RLC0_DUMMY_REG 0x0000000f mmSDMA0_INT_STATUS 0x000000e0 mmSDMA0_VM_CNTL 0xffffffff mmGRBM_STATUS2 0x00000000 Sunil Khatri (2): drm/amdgpu: Add sdma_v5_2 ip dump for devcoredump drm/amdgpu: add print support for sdma_v_5_2 ip_dump drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h | 1 + drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 106 +++++++++++++++++++++++ 2 files changed, 107 insertions(+) -- 2.34.1
