From: Dillon Varone <dillon.varone@xxxxxxx>
[WHY]
DML2.1 currently has no concept of a "blanked" stream. For cases like DPMS off,
things like UCLK p-state is always allowed, so PMO is not required to optimize
for it.
[HOW]
Add flag to DML2.1 display configuration to indicate all streams are blanked,
so certain operations and optimizations can be skipped for optimal programming
when displays are blanked.
Reviewed-by: Chaitanya Dhere <chaitanya.dhere@xxxxxxx>
Signed-off-by: Jerry Zuo <jerry.zuo@xxxxxxx>
Signed-off-by: Dillon Varone <dillon.varone@xxxxxxx>
---
.../amd/display/dc/dml2/dml21/dml21_translation_helper.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c b/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c
index 405544920f3b..e9647f068ee4 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c
+++ b/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c
@@ -957,6 +957,7 @@ bool dml21_map_dc_state_into_dml_display_cfg(const struct dc *in_dc, struct dc_s
int stream_index, plane_index;
int disp_cfg_stream_location, disp_cfg_plane_location;
struct dml2_display_cfg *dml_dispcfg = &dml_ctx->v21.display_config;
+ unsigned int plane_count = 0;
memset(&dml_ctx->v21.dml_to_dc_pipe_mapping, 0, sizeof(struct dml2_dml_to_dc_pipe_mapping));
@@ -1010,10 +1011,16 @@ bool dml21_map_dc_state_into_dml_display_cfg(const struct dc *in_dc, struct dc_s
dml_dispcfg->plane_descriptors[disp_cfg_plane_location].overrides.uclk_pstate_change_strategy =
dml21_force_pstate_method_to_uclk_state_change_strategy(dml_ctx->config.pmo.force_pstate_method_values[stream_index]);
}
+
+ plane_count++;
}
}
}
+ if (plane_count == 0) {
+ dml_dispcfg->overrides.all_streams_blanked = true;
+ }
+
return true;
}
--
2.34.1
