RE: [PATCH] drm/amd/amdgpu: fix SDMA IRQ client ID <-> req mapping.

["Zhang, Hawking" <Hawking.Zhang@xxxxxxx>]

[AMD Official Use Only - AMD Internal Distribution Only]

Please correct the typo in description
CLIENTID_SDMA2 and CLIENTID_SDMA2

With that fixed, the patch is

Reviewed-by: Hawking Zhang <Hawking.Zhang@xxxxxxx>

Regards,
Hawking

-----Original Message-----
From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Gavin Wan
Sent: Tuesday, July 9, 2024 01:20
To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Cc: Wan, Gavin <Gavin.Wan@xxxxxxx>
Subject: [PATCH] drm/amd/amdgpu: fix SDMA IRQ client ID <-> req mapping.

sdma has 2 instances in SRIOV cpx mode. Odd numbered VFs have
sdma0/sdma1 instances. Even numbered vfs have sdma2/sdma3. For Even numbered vfs, the sdma2 & sdma3 (irq srouce id
CLIENTID_SDMA2 and CLIENTID_SDMA2) shoud map to irq seq 0 & 1.

Signed-off-by: Gavin Wan <Gavin.Wan@xxxxxxx>
Change-Id: Ie850114932ca98ea3c9176370dde5dd393ddf7e7
---
 drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c | 20 +++++++++++++-------
 1 file changed, 13 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
index fec5a3d1c4bc..4516cb0b3ae8 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
@@ -82,7 +82,7 @@ static unsigned sdma_v4_4_2_seq_to_irq_id(int seq_num)
        }
 }

-static int sdma_v4_4_2_irq_id_to_seq(unsigned client_id)
+static int sdma_v4_4_2_irq_id_to_seq(struct amdgpu_device *adev,
+unsigned client_id)
 {
        switch (client_id) {
        case SOC15_IH_CLIENTID_SDMA0:
@@ -90,9 +90,15 @@ static int sdma_v4_4_2_irq_id_to_seq(unsigned client_id)
        case SOC15_IH_CLIENTID_SDMA1:
                return 1;
        case SOC15_IH_CLIENTID_SDMA2:
-               return 2;
+               if (amdgpu_sriov_vf(adev) && (adev->gfx.xcc_mask == 0x1))
+                       return 0;
+               else
+                       return 2;
        case SOC15_IH_CLIENTID_SDMA3:
-               return 3;
+               if (amdgpu_sriov_vf(adev) && (adev->gfx.xcc_mask == 0x1))
+                       return 1;
+               else
+                       return 3;
        default:
                return -EINVAL;
        }
@@ -1541,7 +1547,7 @@ static int sdma_v4_4_2_process_trap_irq(struct amdgpu_device *adev,
        uint32_t instance, i;

        DRM_DEBUG("IH: SDMA trap\n");
-       instance = sdma_v4_4_2_irq_id_to_seq(entry->client_id);
+       instance = sdma_v4_4_2_irq_id_to_seq(adev, entry->client_id);

        /* Client id gives the SDMA instance in AID. To know the exact SDMA
         * instance, interrupt entry gives the node id which corresponds to the AID instance.
@@ -1584,7 +1590,7 @@ static int sdma_v4_4_2_process_ras_data_cb(struct amdgpu_device *adev,
        if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__SDMA))
                goto out;

-       instance = sdma_v4_4_2_irq_id_to_seq(entry->client_id);
+       instance = sdma_v4_4_2_irq_id_to_seq(adev, entry->client_id);
        if (instance < 0)
                goto out;

@@ -1603,7 +1609,7 @@ static int sdma_v4_4_2_process_illegal_inst_irq(struct amdgpu_device *adev,

        DRM_ERROR("Illegal instruction in SDMA command stream\n");

-       instance = sdma_v4_4_2_irq_id_to_seq(entry->client_id);
+       instance = sdma_v4_4_2_irq_id_to_seq(adev, entry->client_id);
        if (instance < 0)
                return 0;

@@ -1647,7 +1653,7 @@ static int sdma_v4_4_2_print_iv_entry(struct amdgpu_device *adev,
        struct amdgpu_task_info task_info;
        u64 addr;

-       instance = sdma_v4_4_2_irq_id_to_seq(entry->client_id);
+       instance = sdma_v4_4_2_irq_id_to_seq(adev, entry->client_id);
        if (instance < 0 || instance >= adev->sdma.num_instances) {
                dev_err(adev->dev, "sdma instance invalid %d\n", instance);
                return -EINVAL;
--
2.40.1