[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Tao Zhou <tao.zhou1@xxxxxxx>
> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Hawking
> Zhang
> Sent: Friday, June 21, 2024 11:30 AM
> To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx; Zhou1, Tao <Tao.Zhou1@xxxxxxx>
> Cc: Zhang, Hawking <Hawking.Zhang@xxxxxxx>
> Subject: [PATCH] drm/amdgpu: Fix register access violation
>
> fault_status is read only register. fault_cntl is not accessible from guest
> environment.
>
> Signed-off-by: Hawking Zhang <Hawking.Zhang@xxxxxxx>
> ---
> drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c | 8 +++++---
> drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 3 ++-
> drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c | 8 +++++---
> 3 files changed, 12 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
> b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
> index e14acab5cceb..72109abe7c86 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
> @@ -629,9 +629,11 @@ static bool
> gfxhub_v1_2_query_utcl2_poison_status(struct amdgpu_device *adev,
>
> status = RREG32_SOC15(GC, GET_INST(GC, xcc_id),
> regVM_L2_PROTECTION_FAULT_STATUS);
> fed = REG_GET_FIELD(status, VM_L2_PROTECTION_FAULT_STATUS,
> FED);
> - /* reset page fault status */
> - WREG32_P(SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id),
> - regVM_L2_PROTECTION_FAULT_STATUS), 1, ~1);
> + if (!amdgpu_sriov_vf(adev)) {
> + /* clear page fault status and address */
> + WREG32_P(SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id),
> + regVM_L2_PROTECTION_FAULT_CNTL), 1, ~1);
> + }
>
> return fed;
> }
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index 88b4644f8e96..b73136d390cc 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -672,7 +672,8 @@ static int gmc_v9_0_process_interrupt(struct
> amdgpu_device *adev,
> (amdgpu_ip_version(adev, GC_HWIP, 0) >= IP_VERSION(9, 4, 2)))
> return 0;
>
> - WREG32_P(hub->vm_l2_pro_fault_cntl, 1, ~1);
> + if (!amdgpu_sriov_vf(adev))
> + WREG32_P(hub->vm_l2_pro_fault_cntl, 1, ~1);
>
> amdgpu_vm_update_fault_cache(adev, entry->pasid, addr, status,
> vmhub);
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c
> b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c
> index 7a1ff298417a..8d7267a013d2 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c
> @@ -566,9 +566,11 @@ static bool
> mmhub_v1_8_query_utcl2_poison_status(struct amdgpu_device *adev,
>
> status = RREG32_SOC15(MMHUB, hub_inst,
> regVM_L2_PROTECTION_FAULT_STATUS);
> fed = REG_GET_FIELD(status, VM_L2_PROTECTION_FAULT_STATUS,
> FED);
> - /* reset page fault status */
> - WREG32_P(SOC15_REG_OFFSET(MMHUB, hub_inst,
> - regVM_L2_PROTECTION_FAULT_STATUS), 1, ~1);
> + if (!amdgpu_sriov_vf(adev)) {
> + /* clear page fault status and address */
> + WREG32_P(SOC15_REG_OFFSET(MMHUB, hub_inst,
> + regVM_L2_PROTECTION_FAULT_STATUS), 1, ~1);
> + }
>
> return fed;
> }
> --
> 2.17.1
