On Thu, Jun 20, 2024 at 10:12 AM Danijel Slivka <danijel.slivka@xxxxxxx> wrote:
>
> Clearing the IH_RB_W/RPTR during interrupts disable is not clearing
> the RB_OVERFLOW bit.
> Adding workaround to clear the wptr when enabling interrupts in case
> RB_OVERFLOW bit is set.
>
> Signed-off-by: Danijel Slivka <danijel.slivka@xxxxxxx>
> ---
> drivers/gpu/drm/amd/amdgpu/ih_v6_0.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/ih_v6_0.c b/drivers/gpu/drm/amd/amdgpu/ih_v6_0.c
> index 3cb64c8f7175..d6212a98ca99 100644
> --- a/drivers/gpu/drm/amd/amdgpu/ih_v6_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/ih_v6_0.c
> @@ -147,6 +147,12 @@ static int ih_v6_0_toggle_ring_interrupts(struct amdgpu_device *adev,
> }
>
> if (enable) {
> + if (amdgpu_sriov_vf(adev) &&
> + REG_GET_FIELD(RREG32(ih_regs->ih_rb_wptr), IH_RB_WPTR, RB_OVERFLOW)) {
> + /* clear rptr, wptr*/
> + WREG32(ih_regs->ih_rb_rptr, 0);
> + WREG32(ih_regs->ih_rb_wptr, 0);
> + }
> ih->enabled = true;
> } else {
> /* set rptr, wptr to 0 */
These already get cleared in the else case and this function gets
called at the start of ih_v6_0_irq_init() so these should already be
cleared by the time we get here.
Alex
