Re: [PATCH] drm/amdgpu: Do not wait for MP0_C2PMSG_33 IFWI init in SRIOV

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[AMD Official Use Only - AMD Internal Distribution Only]


Reviewed-by: Vignesh Chander <Vignesh.Chander@xxxxxxx>


From: Victor Lu <victorchengchi.lu@xxxxxxx>
Sent: Friday, June 14, 2024 4:32:21 p.m.
To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx <amd-gfx@xxxxxxxxxxxxxxxxxxxxx>
Cc: Chander, Vignesh <Vignesh.Chander@xxxxxxx>; Lu, Victor Cheng Chi (Victor) <VictorChengChi.Lu@xxxxxxx>
Subject: [PATCH] drm/amdgpu: Do not wait for MP0_C2PMSG_33 IFWI init in SRIOV

SRIOV does not need to wait for IFWI init, and MP0_C2PMSG_33 is blocked
for VF access.

Signed-off-by: Victor Lu <victorchengchi.lu@xxxxxxx>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 26 ++++++++++---------
 1 file changed, 14 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
index 9e0cfe06c8b1..4edcbd272fa4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
@@ -264,19 +264,21 @@ static int amdgpu_discovery_read_binary_from_mem(struct amdgpu_device *adev,
         u32 msg;
         int i, ret = 0;
 
-       /* It can take up to a second for IFWI init to complete on some dGPUs,
-        * but generally it should be in the 60-100ms range.  Normally this starts
-        * as soon as the device gets power so by the time the OS loads this has long
-        * completed.  However, when a card is hotplugged via e.g., USB4, we need to
-        * wait for this to complete.  Once the C2PMSG is updated, we can
-        * continue.
-        */
+       if (!amdgpu_sriov_vf(adev)) {
+               /* It can take up to a second for IFWI init to complete on some dGPUs,
+                * but generally it should be in the 60-100ms range.  Normally this starts
+                * as soon as the device gets power so by the time the OS loads this has long
+                * completed.  However, when a card is hotplugged via e.g., USB4, we need to
+                * wait for this to complete.  Once the C2PMSG is updated, we can
+                * continue.
+                */
 
-       for (i = 0; i < 1000; i++) {
-               msg = RREG32(mmMP0_SMN_C2PMSG_33);
-               if (msg & 0x80000000)
-                       break;
-               usleep_range(1000, 1100);
+               for (i = 0; i < 1000; i++) {
+                       msg = RREG32(mmMP0_SMN_C2PMSG_33);
+                       if (msg & 0x80000000)
+                               break;
+                       usleep_range(1000, 1100);
+               }
         }
 
         vram_size = (uint64_t)RREG32(mmRCC_CONFIG_MEMSIZE) << 20;
--
2.34.1



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