From: Chris Park <chris.park@xxxxxxx>
[Why]
Reference clock, either DPREFCLK or DTBCLK can be a value of 0
which then will encounter division by 0.
[How]
Avoid further calculation and programming if refclk is not
populated.
Reviewed-by: Dillon Varone <dillon.varone@xxxxxxx>
Acked-by: Zaeem Mohamed <zaeem.mohamed@xxxxxxx>
Signed-off-by: Chris Park <chris.park@xxxxxxx>
---
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c b/drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
index 3538e190f217..dac31c4cf2a7 100644
--- a/drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
+++ b/drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
@@ -603,6 +603,10 @@ static void dccg401_set_dp_dto(
BREAK_TO_DEBUGGER();
return;
}
+ if (!params->refclk_hz) {
+ BREAK_TO_DEBUGGER();
+ return;
+ }
if (!dc_is_tmds_signal(params->signal)) {
uint64_t dto_integer;
--
2.34.1
