[AMD Official Use Only - AMD Internal Distribution Only]
> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Mukul
> Joshi
> Sent: Thursday, June 6, 2024 12:51 PM
> To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: Kuehling, Felix <Felix.Kuehling@xxxxxxx>; Deucher, Alexander
> <Alexander.Deucher@xxxxxxx>; Joshi, Mukul <Mukul.Joshi@xxxxxxx>
> Subject: [PATCH] drm/amdgpu: Add missing locking for MES API calls
>
> Add missing locking at a few places when calling MES APIs to ensure
> exclusive access to MES queue.
>
> Signed-off-by: Mukul Joshi <mukul.joshi@xxxxxxx>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
> index 62edf6328566..df6c067b1dc9 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
> @@ -801,7 +801,9 @@ int amdgpu_mes_map_legacy_queue(struct
> amdgpu_device *adev,
> queue_input.mqd_addr = amdgpu_bo_gpu_offset(ring->mqd_obj);
> queue_input.wptr_addr = ring->wptr_gpu_addr;
>
> + amdgpu_mes_lock(&adev->mes);
> r = adev->mes.funcs->map_legacy_queue(&adev->mes, &queue_input);
> + amdgpu_mes_unlock(&adev->mes);
> if (r)
> DRM_ERROR("failed to map legacy queue\n");
>
> @@ -824,7 +826,9 @@ int amdgpu_mes_unmap_legacy_queue(struct
> amdgpu_device *adev,
> queue_input.trail_fence_addr = gpu_addr;
> queue_input.trail_fence_data = seq;
>
> + amdgpu_mes_lock(&adev->mes);
> r = adev->mes.funcs->unmap_legacy_queue(&adev->mes,
> &queue_input);
> + amdgpu_mes_unlock(&adev->mes);
> if (r)
> DRM_ERROR("failed to unmap legacy queue\n");
>
> @@ -845,11 +849,13 @@ uint32_t amdgpu_mes_rreg(struct amdgpu_device
> *adev, uint32_t reg)
> goto error;
> }
>
> + amdgpu_mes_lock(&adev->mes);
> r = adev->mes.funcs->misc_op(&adev->mes, &op_input);
> if (r)
> DRM_ERROR("failed to read reg (0x%x)\n", reg);
> else
> val = *(adev->mes.read_val_ptr);
> + amdgpu_mes_unlock(&adev->mes);
If we're following the pattern, this should go before the if/else block
Kent
>
> error:
> return val;
> @@ -871,7 +877,9 @@ int amdgpu_mes_wreg(struct amdgpu_device *adev,
> goto error;
> }
>
> + amdgpu_mes_lock(&adev->mes);
> r = adev->mes.funcs->misc_op(&adev->mes, &op_input);
> + amdgpu_mes_unlock(&adev->mes);
> if (r)
> DRM_ERROR("failed to write reg (0x%x)\n", reg);
>
> @@ -898,7 +906,9 @@ int amdgpu_mes_reg_write_reg_wait(struct
> amdgpu_device *adev,
> goto error;
> }
>
> + amdgpu_mes_lock(&adev->mes);
> r = adev->mes.funcs->misc_op(&adev->mes, &op_input);
> + amdgpu_mes_unlock(&adev->mes);
> if (r)
> DRM_ERROR("failed to reg_write_reg_wait\n");
>
> @@ -923,7 +933,9 @@ int amdgpu_mes_reg_wait(struct amdgpu_device *adev,
> uint32_t reg,
> goto error;
> }
>
> + amdgpu_mes_lock(&adev->mes);
> r = adev->mes.funcs->misc_op(&adev->mes, &op_input);
> + amdgpu_mes_unlock(&adev->mes);
> if (r)
> DRM_ERROR("failed to reg_write_reg_wait\n");
>
> --
> 2.35.1
